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Patent Agency Ranking
公开(公告)号：KR1020060129567A
公开(公告)日：2006-12-18
申请号：KR1020050048185
申请日：2005-06-07
Applicant: 삼성전자주식회사
Abstract: A specimen for TEM(Transmission Electron Microscope) and a method for manufacturing the same are provided to reduce a time for analyzing pattern wafers by analyzing simultaneously at least four or more pattern wafers. A specimen for TEM includes sectional specimens having analyzing sides which are arranged in parallel with each other. A plurality of analyzing lines(180) have predetermined width and are extended in a parallel direction. An analyzing region(150) is extended along a predetermined direction vertical to the extending direction of the analyzing lines. A peripheral region(160) is formed around the analyzing region. Each of the analyzing lines is attached to each other so that a pair of analyzing sides are opposite to each other.
Abstract translation: 提供了用于TEM（透射电子显微镜）的试样及其制造方法，以通过同时分析至少四个或更多个图案晶片来减少分析图案晶片的时间。 用于TEM的试样包括具有彼此平行布置的分析侧的截面试样。 多条分析线（180）具有预定的宽度并沿平行方向延伸。 分析区域（150）沿着与分析线路的延伸方向垂直的预定方向延伸。 在分析区域周围形成周边区域（160）。 每条分析线彼此附接，使得一对分析侧彼此相对。
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公开(公告)号：KR1020070068013A
公开(公告)日：2007-06-29
申请号：KR1020050129637
申请日：2005-12-26
Applicant: 삼성전자주식회사
IPC: H01L27/146 , H01L21/20
CPC classification number: H01L27/14687 , H01L21/02381
Abstract: A method for fabricating a semiconductor device is provided to prevent warpage of a first wafer by attaching a second wafer to the back surface of a first wafer and by growing a silicon epitaxial layer on the front surface of the first wafer. An oxide layer(110) can be formed on the back surface of a first wafer(100). To the back surface of the first wafer doped with impurities of first density, a second wafer doped with impurities of second density lower than the first density is attached. A silicon epitaxial layer(140) is grown on the front surface of the first wafer by using the second wafer as a diffusion preventing layer for preventing the impurities doped into the first wafer from being diffused.
Abstract translation: 提供了一种用于制造半导体器件的方法，通过将第二晶片附着到第一晶片的背面并通过在第一晶片的前表面上生长硅外延层来防止第一晶片的翘曲。 可以在第一晶片（100）的背面上形成氧化物层（110）。 在掺杂有第一密度的杂质的第一晶片的背表面上，附着掺杂有低于第一密度的第二密度的杂质的第二晶片。 通过使用第二晶片作为扩散防止层，在第一晶片的前表面上生长硅外延层（140），以防止掺杂到第一晶片中的杂质被扩散。
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公开(公告)号：KR1020150134543A
公开(公告)日：2015-12-02
申请号：KR1020140061340
申请日：2014-05-22
Applicant: 삼성전자주식회사
CPC classification number: H01L29/36 , H01L27/1461 , H01L27/14612 , H01L27/14621 , H01L27/14627 , H01L27/14643 , H01L27/14683 , H01L27/14689
Abstract: 반도체소자제조용기판및 반도체소자에서, 상기반도체소자제조용기판은제1 불순물농도의 N형불순물이도핑된하부기판이마련된다. 상기하부기판상에는에피택셜막이구비된다. 또한, 상기하부기판내부에서상기에피택셜막과이격되도록배치되고, 전하를갖는불순물이도핑되고, 상기불순물들은상기제1 불순물농도보다높은제2 불순물농도를갖고, 격자결함들이포함되어있는금속포집영역이포함된다. 상기금속포집영역에서금속오염물들이효과적으로포집될수 있다. 따라서, 상기반도체소자제조용기판의에피택셜막에서의금속오염물이감소될수 있다. 또한, 상기소자제조용기판을이용하여금속오염물에따른영향이거의없는고성능을갖는반도체소자를제조할수 있다.
Abstract translation: 本发明提供一种用于制造半导体器件的衬底和半导体器件。 用于制造半导体器件的衬底包括：掺杂有具有第一杂质浓度的N型杂质的下衬底; 形成在下基板上的外延层; 以及金属收集区域，其设置成与下部基板中的外延层间隔开，掺杂有具有电荷的杂质，其中杂质具有比第一杂质浓度更高的杂质浓度的第二杂质，并且包括晶格缺陷。 金属污染物可以有效收集在金属收集区域。 因此，可以减少用于制造半导体器件的衬底的外延层中的金属污染物。 此外，可以通过使用用于制造器件的衬底来制造几乎不受金属污染物影响的具有高性能的半导体器件。
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公开(公告)号：KR1020100103238A
公开(公告)日：2010-09-27
申请号：KR1020090021760
申请日：2009-03-13
Applicant: 삼성전자주식회사
IPC: H01L21/20 , H01L27/146
CPC classification number: H01L21/22 , H01L21/02532 , H01L21/02639 , H01L21/02658 , H01L21/324 , H01L27/14603 , H01L27/14612 , H01L27/14618 , H01L27/1463 , H01L27/14643 , H01L27/14689 , H01L2224/48095 , H01L2224/48227 , H01L2924/00014
Abstract: PURPOSE: An epitaxial wafer manufacturing method and an epi wafer thereof, and an image sensor thereof are provided to form a high concentration boron layer inside a wafer. CONSTITUTION: A wafer which includes boron is provided by cutting a single crystal silicon ingot(S110). An oxide film is grown in the front and the rear surface of the wafer(S120). The wafer is heat-treated(S130). An insulating layer which is formed in one side of the wafer is removed(S140). One side of the wafer is calender-grinded(S150). An epitaxial layer is formed in the front side of the wafer(S160).
Abstract translation: 目的：提供外延晶片制造方法及其外延晶片及其图像传感器，以在晶片内形成高浓度硼层。 构成：通过切割单晶硅锭提供包括硼的晶片（S110）。 在晶片的前表面和后表面生长氧化膜（S120）。 将晶片进行热处理（S130）。 去除在晶片一侧形成的绝缘层（S140）。 将晶片的一侧压延成型（S150）。 在晶片的正面形成外延层（S160）。
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公开(公告)号：KR100683115B1
公开(公告)日：2007-02-15
申请号：KR1020050048185
申请日：2005-06-07
Applicant: 삼성전자주식회사
Abstract: 투과전자현미경용 시편 및 이의 제조방법은 일측면에 소정의 폭을 가지며 서로 평행한 방향으로 연장하는 다수의 분석 라인들을 갖는 예비 분석 시편을 마련한 후, 상기 예비 분석 시편의 분석 라인면들의 연장 방향과 수직한 방향으로 확장되도록 상기 예비 분석 시편을 연마하여 분석 시편으로 형성한다. 상기 예비 분석시편은 패턴 웨이퍼를 적어도 네 개 구비한다. 따라서 상기 다수의 패턴 웨이퍼를 동시에 분석할 수 있다.
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