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公开(公告)号：KR1020030047516A
公开(公告)日：2003-06-18
申请号：KR1020010078164
申请日：2001-12-11
Applicant: 삼성전자주식회사
IPC: H01L29/78
Abstract: PURPOSE: A MOS transistor having an anti-oxidizing spacer is provided to minimize a gate bird's beak phenomenon, reduce a threshold voltage, and increase the driving current by forming an anti-oxidizing spacer at a sidewall of a gate electrode. CONSTITUTION: A gate insulating layer(205) is formed on a substrate(200). A gate electrode(210a) is formed on a predetermined region of the gate insulating layer. An anti-oxidizing spacer(215a) is formed on a sidewall of the gate electrode. A source and drain(240) is formed on the substrate of both sides of gate patterns which are formed with the gate electrode and the anti-oxidizing spacer. A gate spacer(235a) is formed at an outer sidewall of the anti-oxidizing spacer. A buffer layer(230) is inserted between the gate spacer and the anti-oxidizing spacer. The anti-oxidizing spacer is formed with one selected from a silicon nitride layer, an aluminum oxide layer, and a tantalum pentaoxide layer.
Abstract translation: 目的：提供具有抗氧化间隔物的MOS晶体管，以通过在栅电极的侧壁处形成抗氧化间隔物来最小化门鸟的尖峰现象，降低阈值电压和增加驱动电流。 构成：在基板（200）上形成栅绝缘层（205）。 栅电极（210a）形成在栅极绝缘层的预定区域上。 在栅电极的侧壁上形成抗氧化间隔物（215a）。 源极和漏极（240）形成在由栅电极和抗氧化间隔物形成的栅极图案的两侧的衬底上。 栅极间隔物（235a）形成在抗氧化间隔物的外侧壁处。 缓冲层（230）插入在栅极间隔物和抗氧化间隔物之间。 抗氧化间隔物由选自氮化硅层，氧化铝层和五氧化钽钽层的一个形成。
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公开(公告)号：KR1020020096532A
公开(公告)日：2002-12-31
申请号：KR1020010035092
申请日：2001-06-20
Applicant: 삼성전자주식회사
IPC: H01L21/76
Abstract: PURPOSE: A method for forming an active region having a rounded upper edge is provided to prevent a concentration phenomenon of electric field by rounding an upper edge portion of the active region. CONSTITUTION: A trench mask layer is formed on a semiconductor substrate(100). The trench mask layer is formed with a pad oxide layer, a silicon nitride layer, and a hard mask oxide layer. A trench mask pattern is formed by etching the trench mask layer. The trench mask pattern is formed with a hard mask oxide layer pattern, a silicon nitride layer pattern, and a pad oxide layer pattern. The first trench is formed by etching the semiconductor substrate(100). The second trench(150) is formed at a lower portion of the first trench by etching the semiconductor substrate(100). A recessed silicon nitride layer pattern(122) is formed by etching the silicon nitride layer pattern. A recessed pad oxide layer pattern(112) is formed by etching the pad oxide layer pattern. An edge(300) between an upper portion of an active region and a sidewall of the second trench(150) is rounded by performing an annealing process for the semiconductor substrate(100).
Abstract translation: 目的：提供一种用于形成具有圆形上边缘的有源区域的方法，以通过使有源区域的上边缘部分圆化来防止电场的浓度现象。 构成：在半导体衬底（100）上形成沟槽掩模层。 沟槽掩模层由衬垫氧化物层，氮化硅层和硬掩模氧化物层形成。 通过蚀刻沟槽掩模层形成沟槽掩模图案。 沟槽掩模图案由硬掩模氧化物层图案，氮化硅层图案和衬垫氧化物层图案形成。 通过蚀刻半导体衬底（100）形成第一沟槽。 第二沟槽（150）通过蚀刻半导体衬底（100）形成在第一沟槽的下部。 通过蚀刻氮化硅层图案形成凹陷的氮化硅层图案（122）。 通过蚀刻衬垫氧化物层图案形成凹陷衬垫氧化物层图案（112）。 通过对半导体衬底（100）执行退火处理，在有源区的上部和第二沟槽（150）的侧壁之间的边缘（300）被倒圆。
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公开(公告)号：KR100077721B1
公开(公告)日：1994-09-27
申请号：KR1019910005648
申请日：1991-04-09
Applicant: 삼성전자주식회사
IPC: H01L21/283
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公开(公告)号：KR1019940005730B1
公开(公告)日：1994-06-23
申请号：KR1019910012535
申请日：1991-07-20
Applicant: 삼성전자주식회사
IPC: H01L27/04
Abstract: The method for semiconductor device increases an area of capacitor in order not to inflate a volume of device. The method has an advantage of easing a post-process by reduction of perpendicular distance and maximizing a capacitor by removal of oxidation layer. The method includes: a process which sequentially forms a gate oxidation layer, a gate electrode, and a 1st oxidation layer between semiconductor board and field oxidation layer; a process whcih sequentially forms a 2nd oxidation layer, a nitrogen layer and a 3rd oxidation layer; a process which forms a contact unit of storage electric conduction layer, a process which forms a storage electrode; and a process which forms a plate electrode.
Abstract translation: 半导体器件的方法增加了电容器的面积，以便不使体积的器件膨胀。 该方法具有通过减少垂直距离来缓和后处理并通过去除氧化层使电容器最大化的优点。 该方法包括：在半导体板和场氧化层之间依次形成栅极氧化层，栅电极和第一氧化层的工艺; 顺序形成第二氧化层，氮层和第三氧化层的工艺; 形成存储电导层的接触单元的工序，形成存储电极的工序; 以及形成板电极的工序。
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公开(公告)号：KR1019940001407A
公开(公告)日：1994-01-20
申请号：KR1019920011025
申请日：1992-06-24
Applicant: 삼성전자주식회사
IPC: H01L27/108
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Patent Agency Ranking
公开(公告)号：KR1020030008467A
公开(公告)日：2003-01-29
申请号：KR1020010043122
申请日：2001-07-18
Applicant: 삼성전자주식회사
IPC: H01L21/76
Abstract: PURPOSE: A method for fabricating a semiconductor device using nitride layers having different etching speeds is provided to from an isolation layer for stopping a dent phenomenon by using the nitride layers having different etching speeds. CONSTITUTION: The first nitride layer is formed on a semiconductor substrate(100) under the first pressure. The first nitride layer is formed on the first region of the semiconductor substrate(100) by patterning the first nitride layer pattern(510). The second nitride layer(520) is formed on the semiconductor substrate(100) under the second pressure. The second nitride layer pattern(520) is formed on the second region of the semiconductor substrate(100) by patterning the second nitride layer(520). The first insulating layer pattern(510) is etched by dipping the semiconductor substrate(100) into etchant.
Abstract translation: 目的：通过使用具有不同蚀刻速度的氮化物层，从用于阻止凹陷现象的隔离层提供使用具有不同蚀刻速度的氮化物层来制造半导体器件的方法。 构成：第一氮化物层在第一压力下形成在半导体衬底（100）上。 通过图案化第一氮化物层图案（510），在半导体衬底（100）的第一区域上形成第一氮化物层。 第二氮化物层（520）在第二压力下形成在半导体衬底（100）上。 通过图案化第二氮化物层（520），在半导体衬底（100）的第二区域上形成第二氮化物层图案（520）。 通过将半导体衬底（100）浸入蚀刻剂中来蚀刻第一绝缘层图案（510）。
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公开(公告)号：KR1019960006822B1
公开(公告)日：1996-05-23
申请号：KR1019930006337
申请日：1993-04-15
Applicant: 삼성전자주식회사
IPC: G03F7/00
CPC classification number: H01L27/10852 , H01L21/0337 , H01L28/88
Abstract: The method includes the steps of coating a layer(10), to be patterned, with photoresist(PR), patterning the photoresist layer(PR) into a predetermined pattern using photolithography, anisotropic-etching the photoresist layer to form polymer(13) on the sides of the photoresist pattern, and etching the layer(10) using the photoresist pattern and polymer.
Abstract translation: 该方法包括以下步骤：使用光致抗蚀剂（PR）涂覆待图案化的层（10），使用光刻法将光致抗蚀剂层（PR）图案化成预定图案，各向异性蚀刻光致抗蚀剂层以形成聚合物（13） 光致抗蚀剂图案的侧面，并且使用光致抗蚀剂图案和聚合物蚀刻层（10）。
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