公开(公告)号：KR1020070114949A

公开(公告)日：2007-12-05

申请号：KR1020060048649

申请日：2006-05-30

Applicant: 삼성전자주식회사

Inventor： 강태우 ,  장경호 ,  임장빈 ,  이병삼

IPC: H01L21/3065

CPC classification number: H01L21/67069 ,  H01J37/32449

Abstract: A plasma etching apparatus is provided to concentrate plasma on a center of an upper surface of a substrate by improving a structure thereof. A process chamber provides a space for performing a plasma etching process. A gas supply unit supplies a process gas to form plasma within the process chamber. A lower electrode is formed within the process chamber in order to support a substrate. An upper electrode is formed opposite to the lower electrode within the process chamber in order to apply RF power for exciting the process gas of a plasma state. A gas distribution plate(100) is formed on the upper electrode within the process chamber in order to distribute the process gas to an upper part of the substrate. The gas distribution plate includes a central gas distribution plate(110) having a circular shape and n peripheral gas distribution plates(120) having a ring shape. A bottom surface of the peripheral gas distribution plate is higher than a bottom surface of the central gas distribution plate.

Abstract translation: 提供了一种等离子体蚀刻装置，通过改进其结构将等离子体集中在基板的上表面的中心。 处理室提供进行等离子体蚀刻处理的空间。 气体供应单元提供处理气体以在处理室内形成等离子体。 在处理室内形成下电极以支撑衬底。 上部电极与处理室内的下部电极相对地形成，以便施加用于激发等离子体状态的工艺气体的RF功率。 在处理室内的上电极上形成气体分配板（100），以便将工艺气体分配到衬底的上部。 气体分配板包括具有圆形形状的中心气体分配板（110）和具有环形的n个周边气体分配板（120）。 周边配气板的底面高于中央气体分配板的底面。

公开(公告)号：KR100729264B1

公开(公告)日：2007-06-15

申请号：KR1020060048861

申请日：2006-05-30

Applicant: 삼성전자주식회사

Inventor： 강태우 ,  박종철 ,  임장빈

IPC: H01L21/3065 ,  H01L21/02

Abstract: A gas injector and a wafer processing apparatus having the same are provided to supply uniformly a process gas onto a wafer by controlling the amount and direction of the process gas sprayed from a second body using a position controlling process on a first body. A gas injector(100) includes a first body and a second body. The first body(110) is formed like a cylinder type structure with an upper opening. The first body includes a first hole(116) at a lower surface, a second hole(118) at a lateral and a groove(120) along the first hole. The first body is used for supplying a process gas. The second body(130) is capable of storing the first body. The second body includes a third hole(136) at a lower surface and a fourth hole(138) at a lateral. The second body is used for spraying the process gas supplied from the first body through the third or/and fourth holes according to the height of the first body.

Abstract translation: 提供了一种气体喷射器和具有该气体喷射器的晶片处理设备，以通过使用位置控制处理在第一主体上控制从第二主体喷射的处理气体的量和方向，来均匀地向晶圆上供应处理气体。 气体注射器（100）包括第一本体和第二本体。 第一主体（110）形成为具有上开口的圆柱形结构。 第一主体包括在下表面处的第一孔（116），在侧向处的第二孔（118）以及沿着第一孔的凹槽（120）。 第一个主体用于供应工艺气体。 第二主体（130）能够存储第一主体。 第二主体包括在下表面处的第三孔（136）和在侧面处的第四孔（138）。 第二主体用于根据第一主体的高度喷射从第一主体供给的工艺气体穿过第三或/和第四孔。

公开(公告)号：KR1020070015700A

公开(公告)日：2007-02-06

申请号：KR1020050070205

申请日：2005-08-01

Applicant: 삼성전자주식회사

Inventor： 김종규 ,  임장빈 ,  권상동 ,  최성길 ,  공유철 ,  윤석한

IPC: H01L21/28 ,  H01L21/8242

CPC classification number: H01L27/10847 ,  H01L21/76829 ,  H01L21/76897

Abstract: 반도체 장치의 제조 방법에 있어서, 기판 상에 비트 라인 콘택, 비트 라인 및 하드 마스크 패턴을 포함하는 비트 라인 구조물을 형성한다. 하드 마스크 패턴의 상부 측면에 스페이서를 형성한다. 비트 라인 구조물 사이의 갭을 채우는 제1층간 절연막을 형성하고, 제1층간 절연막을 부분적으로 식각하여 콘택홀을 형성한다. 상기 콘택홀을 매립하는 도전층을 형성하고, 상기 스페이서가 제거되도록 상기 도전층, 하드 마스크 패턴 및 스페이서를 연마함으로서 콘택 플러그를 형성한다. 따라서, 상기 스페이서에 의해 상기 하드 마스크 패턴의 측벽이 식각 손상되는 것이 억제됨으로써, 후속하는 커패시터 형성을 위한 이방성 식각 공정에 대한 충분한 마진이 확보될 수 있다.

公开(公告)号：KR1020040001293A

公开(公告)日：2004-01-07

申请号：KR1020020036442

申请日：2002-06-27

Applicant: 삼성전자주식회사

Inventor： 이성춘 ,  고용선 ,  임장빈 ,  권혁진 ,  권상동

IPC: H01L21/3205

Abstract: PURPOSE: A method for forming a contact of a semiconductor device is provided to be capable of easily carrying out a gap-fill process. CONSTITUTION: A plurality of lower metal lines(105) are formed at the upper portion of a substrate(100). An insulating layer is formed at the upper portion of the resultant structure, wherein the insulating layer is made of the first TEOS(TetraEthylOrthoSilicate) layer(110), a FOX layer(115), and the second TEOS layer(120). After forming a photoresist pattern at the upper portion of the resultant structure, the first opening portion is formed at the insulating layer by carrying out an isotropic etching process. The second opening portion is formed at the lower portion of the first opening portion by carrying out an anisotropic etching process for exposing the lower metal line. After removing the photoresist pattern, the third opening portion is formed by carrying out the isotropic etching process at the first and second opening portion. Then, a via contact(180) is formed at the inner portion of the third opening portion.

Abstract translation: 目的：提供一种用于形成半导体器件的接触的方法，以便能够容易地进行间隙填充处理。 构成：在基板（100）的上部形成多个下金属线（105）。 在所得结构的上部形成绝缘层，其中绝缘层由第一TEOS（四乙基硅酸盐）层110，FOX层115和第二TEOS层120构成。 在所得结构的上部形成光致抗蚀剂图案之后，通过进行各向同性蚀刻处理，在绝缘层上形成第一开口部。 第二开口部分通过执行用于暴露下金属线的各向异性蚀刻工艺形成在第一开口部分的下部。 在去除光致抗蚀剂图案之后，通过在第一和第二开口部分进行各向同性蚀刻工艺来形成第三开口部分。 然后，在第三开口部分的内部形成通孔接触件（180）。

公开(公告)号：KR1020030095779A

公开(公告)日：2003-12-24

申请号：KR1020020033350

申请日：2002-06-14

Applicant: 삼성전자주식회사

Inventor： 공유철 ,  임장빈

IPC: H01L21/28

Abstract: PURPOSE: A method for forming a contact plug of a semiconductor device is provided to be capable of reducing process cost by changing processes. CONSTITUTION: A contact hole is formed by selectively etching an interlayer dielectric of a semiconductor substrate(S100). A barrier metal is deposited at the upper portion of the resultant structure by carrying out a blanket type depositing process(S110). A tungsten layer is deposited on the entire surface of the resultant structure for completely filling the contact hole(S120). The first dry etching process is carried out at the resultant structure for exposing the barrier metal by using the barrier metal as an etching stop layer(S130). The second dry etching process is carried out at the resultant structure for removing the exposed barrier metal(S140).

Abstract translation: 目的：提供一种用于形成半导体器件的接触插塞的方法，以能够通过改变工艺来降低工艺成本。 构成：通过选择性地蚀刻半导体衬底的层间电介质形成接触孔（S100）。 通过进行毯式沉积工艺，在所得结构的上部沉积阻挡金属（S110）。 在所得结构的整个表面上沉积钨层以完全填充接触孔（S120）。 在通过使用阻挡金属作为蚀刻停止层使所述阻挡金属曝光的所得结构下进行第一干蚀刻工艺（S130）。 在所得到的结构中进行第二次干蚀刻处理以除去暴露的阻挡金属（S140）。

公开(公告)号：KR1020020013302A

公开(公告)日：2002-02-20

申请号：KR1020000046987

申请日：2000-08-14

Applicant: 삼성전자주식회사

Inventor： 김명철 ,  안태혁 ,  임장빈

IPC: H01L21/28

Abstract: PURPOSE: A method for forming a bit line contact hole of a semiconductor device is provided to maximumly control corrosion of a nitride layer constituting a cap layer and a sidewall spacer which cover a gate electrode layer, by performing an etch process for forming a bit line contact hole in an etch condition in which selectivity of the nitride layer is not lower than an etch condition of a self-aligned contact hole. CONSTITUTION: The gate electrode(108) capped with the nitride layer is formed on a semiconductor substrate(100), and a self-aligned contact hole is opened. A polysilicon contact plug is formed inside the open self-aligned contact hole. An oxide layer(114) is applied on the semiconductor substrate having the contact plug. A photoresist pattern for a bit line contact is formed on the oxide layer. The oxide layer is etched by using the photoresist pattern as an etch mask in an etch condition in which the selectivity of the nitride layer is not lower than the etch condition of the self-aligned contact hole.

Abstract translation: 目的：提供一种用于形成半导体器件的位线接触孔的方法，以通过执行用于形成位线的蚀刻工艺来最大程度地控制构成盖层的氮化物层和覆盖栅极电极层的侧壁间隔物的腐蚀 接触孔，其中氮化物层的选择性不低于自对准接触孔的蚀刻条件。 构成：在半导体衬底（100）上形成用氮化物层覆盖的栅电极（108），并且打开自对准的接触孔。 在开放的自对准接触孔内形成多晶硅接触插塞。 在具有接触插塞的半导体衬底上施加氧化物层（114）。 在氧化物层上形成用于位线接触的光致抗蚀剂图案。 在其中氮化物层的选择性不低于自对准接触孔的蚀刻条件的蚀刻条件下，通过使用光致抗蚀剂图案作为蚀刻掩模来蚀刻氧化物层。

公开(公告)号：KR1020010028673A

公开(公告)日：2001-04-06

申请号：KR1019990041054

申请日：1999-09-22

Applicant: 삼성전자주식회사

Inventor： 박현정 ,  강성훈 ,  박성준 ,  남신우 ,  임장빈

IPC: H01L21/28

Abstract: PURPOSE: A method for forming a contact hole is to form contact holes having various depths using an etching process by increasing a selectivity ratio without decreasing an etching rate. CONSTITUTION: A wafer chuck(510) is provided below a reactivity ion etching chamber(500). A semiconductor substrate(520) has a material layer formed thereon. The semiconductor substrate is mounted on the wafer chuck. The wafer chuck acts as a lower electrode. An upper electrode(530) is arranged above a reactivity ion etching chamber(500). Pluralities of grooves are formed in the upper electrode. Each groove is connected to a gas supply unit, and forms a path for supplying a reactivity ion etching gas and a selectivity ratio increasing gas. RF power sources(540, 550) are connected to the upper part and the lower part of the reactivity ion-etching chamber. An electromagnet(560) is connected to the sidewall of the reactivity ion-etching chamber, and provides an electromagnetic energy for forming plasma.

Abstract translation: 目的：用于形成接触孔的方法是通过在不降低蚀刻速率的情况下增加选择比来使用蚀刻工艺形成具有各种深度的接触孔。 构成：在反应离子蚀刻室（500）的下方设置有晶片卡盘（510）。 半导体衬底（520）上形成有材料层。 半导体衬底安装在晶片卡盘上。 晶片卡盘用作下电极。 上电极（530）设置在反应离子蚀刻室（500）的上方。 在上电极中形成多个槽。 每个槽连接到气体供应单元，并且形成用于提供反应性离子蚀刻气体和选择比增加气体的路径。 RF电源（540,550）连接到反应性离子蚀刻室的上部和下部。 电磁体（560）连接到反应性离子蚀刻室的侧壁，并提供用于形成等离子体的电磁能。

公开(公告)号：KR1020000008925A

公开(公告)日：2000-02-15

申请号：KR1019980029023

申请日：1998-07-18

Applicant: 삼성전자주식회사

Inventor： 정철 ,  한민석 ,  임장빈 ,  최창원

IPC: H01L21/28

Abstract: PURPOSE: A method for manufacturing a semiconductor device is provided to improve a contact resistance between a contact plug and a conductive layer formed on the contact plug. CONSTITUTION: A method for manufacturing a semiconductor device includes a first through seventh steps. The first step is to form a contact hole(36) for exposing an active area of the semiconductor device by etching a first insulation layer formed on a semiconductor substrate(30). The second step is to form a first conductive layer on the first insulation layer so as to fill up the contact hole. The third step is to form a contact plug(37a) by etching back the first conductive layer until the upper surface of the first insulation layer of both side of the contact hole. At this step, a damage layer(37b) is formed on the upper surface of the contact plug during the etch-back. The fourth step is to form a second insulation layer on the first insulation layer including the contact plug. The fifth step is to form an opening exposing a portion of the first insulation layer of both sides of the damage layer and the damage layer by partially etching the second insulation layer. The sixth step is to delete the damage layer. The seventh step is to fill up the opening with a second conductive layer.

Abstract translation: 目的：提供一种用于制造半导体器件的方法，以改善接触插塞和形成在接触插塞上的导电层之间的接触电阻。 构成：制造半导体器件的方法包括第一至第七步骤。 第一步是通过蚀刻形成在半导体衬底（30）上的第一绝缘层形成用于暴露半导体器件的有源区的接触孔（36）。 第二步骤是在第一绝缘层上形成第一导电层以填充接触孔。 第三步骤是通过蚀刻第一导电层直到接触孔两侧的第一绝缘层的上表面形成接触塞（37a）。 在该步骤中，在回蚀期间，在接触插塞的上表面上形成损伤层（37b）。 第四步骤是在包括接触插塞的第一绝缘层上形成第二绝缘层。 第五步骤是通过部分地蚀刻第二绝缘层来形成暴露损伤层的两侧的第一绝缘层的一部分和损伤层的开口。 第六步是删除损伤层。 第七步是用第二个导电层填充开口。

公开(公告)号：KR1019990051415A

公开(公告)日：1999-07-05

申请号：KR1019970070732

申请日：1997-12-19

Applicant: 삼성전자주식회사

Inventor： 배용국 ,  임장빈 ,  김재환

IPC: H01L21/28

Abstract: 본 발명은 반도체 소자의 제조방법에 관한 것으로, 특히 텡스텐으로 된 금속 배선을 나칭 현상에 의한 끊어짐이 발생않도록 형성할 수 있는 반도체 소자의 금속 배선 형성방법에 관한 것이다. 텅스텐막을 반도체 기판 상에 형성한다. 티타늄 나이트라이드로 된 반사방지막을 텅스텐막 상에 형성한다. 사진 식각으로 반사방지막과 텅스텐막을 패터닝하여 금속 배선을 형성한다.

公开(公告)号：KR1020080005662A

公开(公告)日：2008-01-15

申请号：KR1020060064263

申请日：2006-07-10

Applicant: 삼성전자주식회사

Inventor： 강태우 ,  임장빈 ,  배종환 ,  이병삼 ,  김대운

IPC: H01L21/02

CPC classification number: H01L21/02 ,  H01L21/6719 ,  H01L21/67201

Abstract: An apparatus for attaching or detaching a cover of a chamber is provided to prevent a shower head attached to a bottom surface of the cover from being damaged by preventing the cover and a container body from being collided with each other at the time of attaching or detaching the cover. An apparatus(100) for attaching or detaching a cover(14) of a chamber includes a supporting unit(110) and a driving unit(120). The supporting unit is attached to the cover attachable to or detachable from a container body(12). The supporting unit is attached to the container body. The driving unit linearly moves the supporting unit so as to attach or detach the cover to or from the container body. Plural driving units are arranged along the circumference of the container body at a predetermined interval. The supporting unit is projected to the outside of the cover. The supporting unit and the driving unit are attachable or detachable.

Abstract translation: 提供一种用于安装或拆卸室的盖子的装置，以防止在安装或拆卸时防止盖子和容器主体相互碰撞而附着在盖的底表面上的淋浴头被损坏 封面。 用于安装或拆卸腔室的盖子（14）的装置（100）包括支撑单元（110）和驱动单元（120）。 支撑单元附接到可附接到容器主体（12）上或从容器主体（12）拆卸的盖子。 支撑单元附接到容器主体。 驱动单元直线地移动支撑单元，以将盖与容器主体相连或者分离。 多个驱动单元以预定间隔沿容器主体的圆周布置。 支撑单元投影到盖的外侧。 支撑单元和驱动单元是可附接或可拆卸的。