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公开(公告)号：KR1020130029327A
公开(公告)日：2013-03-22
申请号：KR1020120052200
申请日：2012-05-16
Applicant: 한국전자통신연구원
Abstract: PURPOSE: A single frequency synthesizer based FDD(Frequency Division Duplex) transceiver is provided to execute frequency upper and lower conversion by using a single frequency synthesizer. CONSTITUTION: A duplexer(630) transmits a signal of an RF(Radio Frequency) band through an antenna. A receiver(650) amplifies the received RF band signal from the antenna through the duplexer. The receiver executes the lower frequency conversion of the amplified signal. The receiver processes the analog signal processing of the lower frequency converted signal. A frequency synthesizer(660) generates a carrier frequency for executing the frequency lower conversion in the receiver by executing an upper frequency conversion in a transmitter. [Reference numerals] (610) Transmission signal processing unit; (611) Digital filter; (612) IF up-conversion unit; (613) IF generating and processing unit; (622) Analog front-end unit; (623) RF up-conversion unit; (624) Bandpass filter; (630) Duplexer; (650) Receiver; (660) Frequency synthesizer; (AA) Digital baseband 1; (BB) Digital baseband Q; (CC) Transmission frequency information; (DD) Reception frequency information
Abstract translation: 目的：提供基于单频合成器的FDD（频分双工）收发器，通过使用单个频率合成器来执行频率上下转换。 构成：双工器（630）通过天线发送RF（射频）频带的信号。 接收机（650）通过双工器放大从天线接收的RF频带信号。 接收机执行放大信号的较低频率转换。 接收器处理较低频率转换信号的模拟信号处理。 频率合成器（660）通过在发射机中执行较高的频率转换来产生用于在接收机中执行频率较低转换的载波频率。 （附图标记）（610）发送信号处理单元; （611）数字滤波器; （612）IF上变频单元; （613）IF生成处理单元; （622）模拟前端单元; （623）RF上变频单元; （624）带通滤波器; （630）双工器; （650）接收器; （660）频率合成器; （AA）数字基带1; （BB）数字基带Q; （CC）传输频率信息; （DD）接收频率信息
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公开(公告)号：KR1020110040656A
公开(公告)日：2011-04-20
申请号：KR1020100081571
申请日：2010-08-23
Applicant: 한국전자통신연구원
Abstract: PURPOSE: A digital RF converter and an RF converting method thereof are provided to prevent unnecessary power consumption by using only the current source corresponding to total current quantity at an RF path. CONSTITUTION: A DRFC(Digital to RF Converter)(21c) comprises a digital preprocessor(270) and a plurality of blocking switches(2800 to 280N). The digital preprocessor receives the output of a digital delay device(2620 to 262N+1). The digital preprocessor generates a control signal for operating a current switch(2640 to 264N) and a blocking switch. The blocking switch is electrically connected in response to the control signal.
Abstract translation: 目的：提供数字RF转换器及其RF转换方法，以通过仅使用与RF路径上的总电流量相对应的电流源来防止不必要的功率消耗。 构成：DRFC（数字到RF转换器）（21c）包括数字预处理器（270）和多个阻塞开关（2800至280N）。 数字预处理器接收数字延迟器（2620〜262N + 1）的输出。 数字预处理器产生用于操作电流开关（2640至264N）和阻塞开关的控制信号。 阻塞开关响应于控制信号被电连接。
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公开(公告)号：KR101587961B1
公开(公告)日：2016-01-26
申请号：KR1020120052200
申请日：2012-05-16
Applicant: 한국전자통신연구원
Abstract: 본발명은단일주파수합성기기반의 FDD 트랜시버에관한것으로서, 한개의단일주파수합성기를사용하여송신과수신시주파수상향변환및 하향변환할 수있도록캐리어주파수를생성하여제공함으로써전체적인시스템의면적, 전력소모및 설계복잡도를줄일수 있어시스템의성능을향상시킬수 있다.
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公开(公告)号：KR1020140112656A
公开(公告)日：2014-09-24
申请号：KR1020130026891
申请日：2013-03-13
Applicant: 한국전자통신연구원
Abstract: An embodiment of the present invention provides a digital phase locked loop which includes: a time-to-digital converter (TDC) which outputs a digital bit based on a reference clock and an input clock. The TDC includes a first arbiter group which outputs a first logic value by compensating a phase difference between the input clock and the reference clock with a first average offset; a second arbiter group which outputs a second logic value by compensating the phase difference between the input clock and the reference clock with a second average offset; and a signal processing unit which outputs the digital bit based on the first and second logic values.
Abstract translation: 本发明的一个实施例提供一种数字锁相环，其包括：基于参考时钟和输入时钟输出数字位的时间数字转换器（TDC）。 TDC包括第一仲裁器组，其通过以第一平均偏移补偿输入时钟和参考时钟之间的相位差来输出第一逻辑值; 第二仲裁器组，通过用第二平均偏移补偿输入时钟和参考时钟之间的相位差来输出第二逻辑值; 以及信号处理单元，其基于第一和第二逻辑值输出数字位。
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Patent Agency Ranking
公开(公告)号：KR101292667B1
公开(公告)日：2013-08-02
申请号：KR1020100027986
申请日：2010-03-29
Applicant: 한국전자통신연구원
Abstract: 본 발명은 송신기의 동적 영역 및 신호대 잡음비를 향상 시킬 수 있도록 하는 디지털 RF 컨버터 및 이를 포함하는 디지털 RF 변조기와 송신기에 관한 것으로, 상기 디지털 RF 컨버터는 제1 샘플링 속도로, 입력 신호 중 최하위 n비트에 상응하는 전류 크기를 발생하는 DSMB(Delta-sigma modulated bits) 서브 블록; 상기 제1 샘플링 속도 보다 낮은 제2 샘플링 속도로, 상기 입력 신호 중 중간의 k비트에 상응하는 전류 크기를 발생하는 LSB(Least-Significant Bit) 서브 블록; 및 상기 제2 샘플링 속도로, 상기 입력 신호 중 최상위 m비트에 상응하는 전류 크기를 발생하는 MSB(Most-Significant Bit) 서브 블록을 포함할 수 있다.
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公开(公告)号：KR101377588B1
公开(公告)日：2014-03-25
申请号：KR1020100081571
申请日：2010-08-23
Applicant: 한국전자통신연구원
Abstract: 디지털입력신호를 RF 신호로변환하는디지털 RF 변환기에서, 차동스위치가발진신호에응답하여서제1 및제2 노드를제1 및제2 RF 출력단자에선택적으로연결한다. 적어도하나의디지털지연소자열이디지털입력신호에해당하는입력비트를차례로지연하여서복수의단위비트를출력하고, 전치프로세서가디지털지연소자열의출력을합산한다. 복수의전류원에각각대응하는복수의스위치가복수의전류원중 전치프로세서의합산값에대응하는개수의전류원의전류를제1 및제2 노드중 어느하나로전달한다.
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公开(公告)号：KR1020130036697A
公开(公告)日：2013-04-12
申请号：KR1020120052201
申请日：2012-05-16
Applicant: 한국전자통신연구원
IPC: H04L27/18
CPC classification number: H04L27/20
Abstract: PURPOSE: A device for inputting the signal of a digital-RF converter is provided to improve a signal-noise ratio by generating noise generated by the excessive response of an input signal in a specific frequency or a random frequency. CONSTITUTION: A device for inputting the signal of a digital-RF converter(100) includes a phase-modulated signal input unit inputting a phase-modulated transmission signal into the LO switch(130) of the digital-RF converter; and a digital signal input unit modifying a digital signal in order to correspond to the phase-modulated transmission signal and inputting the modified digital signal into the data switch(121,122) of the digital-RF converter.
Abstract translation: 目的：提供用于输入数字RF转换器的信号的装置，用于通过产生由特定频率或随机频率的输入信号的过度响应产生的噪声来提高信噪比。 构成：用于输入数字RF转换器（100）的信号的装置包括相位调制信号输入单元，其将相位调制的发送信号输入到数字RF转换器的LO开关（130）中; 以及数字信号输入单元，其修改数字信号以便对应于相位调制的传输信号，并将修改的数字信号输入到数字RF转换器的数据开关（121,122）中。
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公开(公告)号：KR1020130029346A
公开(公告)日：2013-03-22
申请号：KR1020120101370
申请日：2012-09-13
Applicant: 한국전자통신연구원
IPC: H03D7/00
Abstract: PURPOSE: A programmable demodulation frequency mixer is provided to improve the performance of a transceiver by reducing a process band width of the transceiver, power consumption, and the size of a chip. CONSTITUTION: A programmable demodulation frequency mixer(20) includes an I/Q signal changing unit(210), a mixer unit(220), and a calculating unit(230). The mixer unit changes an I signal and a Q signal inputted from an I/Q signal input unit according to an oscillation signal generated from an oscillator. The calculating unit adds up or deducts the I and Q signals inputted the mixer unit in order to generate an output signal. The I/Q signal changing unit adjusts a path and a symbol of the I and Q signals inputted from the calculating unit or the mixer unit according to an I/Q control signal. [Reference numerals] (10) I/Q signal input unit; (211) First I/Q signal changing part; (212) Second I/Q signal changing part; (231) First calculator; (232) Second calculator; (240) Oscillator; (250) Oscillation signal changing unit; (30) I/Q signal processing unit
Abstract translation: 目的：提供可编程解调混频器，通过降低收发器的工艺带宽，功耗和芯片尺寸来提高收发器的性能。 构成：可编程解调混频器（20）包括I / Q信号改变单元（210），混频器单元（220）和计算单元（230）。 混频器单元根据从振荡器产生的振荡信号改变从I / Q信号输入单元输入的I信号和Q信号。 计算单元相加或减去输入混频器单元的I和Q信号，以产生输出信号。 I / Q信号改变单元根据I / Q控制信号调整从计算单元或混频器单元输入的I和Q信号的路径和符号。 （附图标记）（10）I / Q信号输入单元; （211）第一I / Q信号变换部; （212）第二I / Q信号变换部分; （231）第一计算器; （232）第二计算器; （240）振荡器; （250）振荡信号改变单元; （30）I / Q信号处理单元
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公开(公告)号：KR1020110070675A
公开(公告)日：2011-06-24
申请号：KR1020100027986
申请日：2010-03-29
Applicant: 한국전자통신연구원
Abstract: PURPOSE: A digital RF converter, and a digital RF modulator and a transmitter including the same are provided to effectively increase the dynamic area and SNR of the transmitter without increasing the number of digital RF converting cells. CONSTITUTION: A DSMB(Delta-sigma modulated bits) sub block(331) creates the current of a size corresponding to the lowest n bit of input signals at a first sampling rate. An LSB(Least-Significant Bit) sub block(332) creates the current of a size corresponding to a middle k bit of the input signal at a second sampling rate lower than the first sampling rate. An MSB(Most-Significant Bit) sub block(333) creates the current of a size corresponding to the highest m bit of the input signal at the second sampling rate.
Abstract translation: 目的：提供数字RF转换器，数字RF调制器和包括该数字RF调制器的发射器，以有效增加发射机的动态面积和SNR，而不增加数字RF转换单元的数量。 构成：DSMB（Δ-Σ调制比特）子块（331）以第一采样率产生与最低n位输入信号相对应的大小的电流。 LSB（最低有效位）子块（332）以低于第一采样率的第二采样率产生与输入信号的中间k位相对应的大小的电流。 MSB（最高有效位）子块（333）以第二采样率产生与输入信号的最高m位相对应的大小的电流。
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