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公开(公告)号：KR20210028050A
公开(公告)日：2021-03-11
申请号：KR1020200001972A
申请日：2020-01-07
Applicant: 한국전자통신연구원
IPC: B23K3/02 , B23K26/142 , B23K26/18
CPC classification number: B23K3/029 , B23K26/142 , B23K26/18
Abstract: 본 발명은 솔더가 형성된 기판을 지지하는 스테이지, 상기 솔더를 용융시키도록 구성된 레이저, 상기 용융된 솔더를 흡수하도록 구성된 메시 구조체, 및 상기 메시 구조체를 지지하는 지지 기판을 포함하는 솔더 제거 장치 및 이를 이용한 솔더 제거방법에 관한 것이다.
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公开(公告)号：KR101923727B1
公开(公告)日：2018-11-29
申请号：KR1020120055169
申请日：2012-05-24
Applicant: 한국전자통신연구원
Abstract: 본발명은복수개의로직칩을적층구조로형성하고, 복수의로직칩은제일하단의로직칩상에함께적층된복수의메모리칩을 SPI(Serial Peripheral Interface) 방식과같은인터페이스를통해선택적으로제어하는적층형반도체모듈에관한것으로, 본발명에따른적층형반도체모듈은, 제1 로직칩; 상기제1 로직칩보다면적이작고, 상기제1 로직칩 상에적층되는제2 로직칩; 상기제1 로직칩 상에적층된복수의메모리칩; 상기제1 로직칩 상이면서, 상기복수의메모리칩과상기제2 로직칩 아래에마련되고, 재배선경로가형성되어있는재배선층을포함하는것을특징으로한다.
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公开(公告)号：KR1020160056370A
公开(公告)日：2016-05-20
申请号：KR1020140155505
申请日：2014-11-10
Applicant: 한국전자통신연구원
Abstract: 본발명의일 실시예에따른열전소자는제 1 기판이제공되고, 상기제 1 기판상에제 1 전극및 제 2 전극이제공되고, 상기제 1 전극상에제 1 레그가제공되고, 상기제 2 전극상에제 2 레그가제공되고, 상기제 1 및제 2 레그들상에제 3 전극가제공되고, 상기제 3 전극상에제 2 기판이제공되고, 상기제 1 기판과상기제 1 및제 2 전극들사이제 1 접착부재가제공되고, 상기레그들과상기전극들사이제 2 접착부재가제공되고, 상기제 3 전극과상기제 2 기판사이제 3 접착부재가제공된다. 상기제 1 내지제 3 접착부재들중 적어도하나는 HCP를포함하는제 1 솔더를포함한다. 접착부재로제 1 솔더를사용함으로써열처리과정에서의안정성과열전소자의열적구동범위를늘릴수 있다. 접착부재로제 1 솔더를사용함으로써전도성과접착성을향상시킬수 있다.
Abstract translation: 在根据本发明实施例的热电模块中，提供第一基板; 第一电极和第二电极设置在第一基板上; 在第一电极上设置第一支脚; 第二腿设置在第二电极上; 第三电极设置在第一和第二支腿上; 第二基板设置在第三电极上; 第一粘合构件设置在第一基板和第一电极之间以及第一基板和第二电极之间; 第二粘合构件设置在腿和电极之间; 并且第三粘合构件设置在第三电极和第二基板之间。 第一至第三粘合剂构件中的至少一个包括具有HCP的第一焊料。 通过使用第一焊料作为粘合部件，可以提高热电模块的热处理工序和热操作范围的稳定性，能够提高导电性和粘接性。
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公开(公告)号：KR1020150083628A
公开(公告)日：2015-07-20
申请号：KR1020140003400
申请日：2014-01-10
Applicant: 한국전자통신연구원
IPC: H01L23/08
CPC classification number: H01L23/552 , H01L23/66
Abstract: 본발명은적층모듈용전자기간섭차폐방법에관한것이다. 본발명의적층모듈용전자기간섭차폐방법은복수개의디바이스들을적층하는단계, 및적층된복수의디바이스들중에서제 1 디바이스와제 2 디바이스사이에실리콘기판을삽입하는단계를포함하고, 실리콘기판의비저항은잡음을차폐할수 있는값을갖는것을특징으로한다.
Abstract translation: 本发明涉及屏蔽层叠模块的电磁干扰的方法。 根据本发明的用于屏蔽用于堆叠模块的电磁干扰的方法包括以下步骤：在累积的装置中累积多个装置并将硅衬底插入第一装置和第二装置之间。 硅衬底的非电阻具有屏蔽噪声的值。
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公开(公告)号：KR101208028B1
公开(公告)日：2012-12-04
申请号：KR1020090055478
申请日：2009-06-22
Applicant: 한국전자통신연구원
IPC: H01L23/48
CPC classification number: H01L24/81 , H01L21/486 , H01L21/563 , H01L23/29 , H01L23/293 , H01L23/49816 , H01L23/49827 , H01L24/16 , H01L24/29 , H01L24/32 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/05644 , H01L2224/05655 , H01L2224/05666 , H01L2224/05669 , H01L2224/1134 , H01L2224/1152 , H01L2224/73104 , H01L2224/73203 , H01L2224/81192 , H01L2224/818 , H01L2224/81801 , H01L2224/83194 , H01L2924/00013 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15787 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
Abstract: 본발명은반도체패키지의제조방법및 이에의해제조된반도체패키지를개시한다. 이반도체패키지의제조방법에의하면, 단자가형성된기판상에고분자수지와솔더입자를포함하는혼합물을도포하고가열함으로써, 솔더입자가가열된고분자수지내에서상기단자쪽으로유동(또는확산)하여상기단자의노출된표면, 즉상기단자의측면과상부면에부착되어솔더막이형성된다. 이러한솔더막은후속의플립칩본딩공정에서반도체칩의단자와기판의단자사이의접착력을향상시킬수 있다.
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Patent Agency Ranking
公开(公告)号：KR1020120108500A
公开(公告)日：2012-10-05
申请号：KR1020110026431
申请日：2011-03-24
Applicant: 한국전자통신연구원
CPC classification number: B22F9/04 , B22F9/06 , B22F2998/10 , B23K35/0244 , C22C1/0483 , B22F1/0059 , B22F1/0077 , B22F2202/01
Abstract: PURPOSE: A method for manufacturing solder particles with diameter of sub-micrometers or several micrometers is provided to obtain a small particle size without increase of an oxide film. CONSTITUTION: A method for manufacturing solder particles with diameter of sub-micrometers or several micrometers comprises the steps of: mixing solder particles(4) having a diameter of 10-1000um with single polymer resin, heating the mixture at a temperature higher than the melting point of the solder particles, applying ultrasonic waves to the mixed solution to reduce the diameter of the solder particles below 0.1-10 um, and cooling the solder particles at the room temperature without exposure to the atmosphere.
Abstract translation: 目的：提供直径为亚微米或几微米的焊料颗粒的制造方法，以便不增加氧化膜而获得小的粒径。 构成：用于制造直径为亚微米或几微米的焊料颗粒的方法包括以下步骤：将直径为10-1000μm的焊料颗粒（4）与单一聚合物树脂混合，在高于熔融温度的温度下加热该混合物 点，将超声波施加到混合溶液中以将焊料颗粒的直径减小到低于0.1-10μm，并且在室温下冷却焊料颗粒而不暴露于大气中。
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公开(公告)号：KR1020110041181A
公开(公告)日：2011-04-21
申请号：KR1020090098239
申请日：2009-10-15
Applicant: 한국전자통신연구원
CPC classification number: H01L25/50 , H01L24/29 , H01L2224/114 , H01L2224/1152 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13139 , H01L2224/13147 , H01L2224/1403 , H01L2224/16225 , H01L2224/16227 , H01L2224/2919 , H01L2224/2929 , H01L2224/73104 , H01L2224/73204 , H01L2224/81191 , H01L2224/83101 , H01L2224/83138 , H01L2224/83191 , H01L2225/06513 , H01L2225/06575 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/014 , H01L2924/15787 , H01L2924/01083 , H01L2924/00014 , H01L2924/00012
Abstract: PURPOSE: A flip chip bonding method and structure thereof are provided to bond a solder bump which has the shortest height using a first resin with first and second electrodes, thereby preventing defective bonding of the solder bump. CONSTITUTION: A first electrode(12) and a second electrode(32) are formed on a first substrate(10) and a second substrate(30) facing each other. A solder bump(14) is formed between the first electrode and the second electrode. The solder bump electrically connects the first electrode with the second electrode. A space ball(42) keeps the gap between the first substrate and the second substrate. The first substrate and the second substrate are bonded by an underfill layer(40).
Abstract translation: 目的：提供一种倒装芯片接合方法及其结构，用第一和第二电极将具有最短高度的焊料凸块与第一和第二电极接合，从而防止焊料凸块的接合不良。 构成：第一电极（12）和第二电极（32）形成在彼此面对的第一基板（10）和第二基板（30）上。 在第一电极和第二电极之间形成焊料凸点（14）。 焊料凸点将第一电极与第二电极电连接。 空间球（42）保持第一基板和第二基板之间的间隙。 第一衬底和第二衬底通过底部填充层（40）结合。
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公开(公告)号：KR1020100137183A
公开(公告)日：2010-12-30
申请号：KR1020090055478
申请日：2009-06-22
Applicant: 한국전자통신연구원
IPC: H01L23/48
CPC classification number: H01L24/81 , H01L21/486 , H01L21/563 , H01L23/29 , H01L23/293 , H01L23/49816 , H01L23/49827 , H01L24/16 , H01L24/29 , H01L24/32 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/05644 , H01L2224/05655 , H01L2224/05666 , H01L2224/05669 , H01L2224/1134 , H01L2224/1152 , H01L2224/73104 , H01L2224/73203 , H01L2224/81192 , H01L2224/818 , H01L2224/81801 , H01L2224/83194 , H01L2924/00013 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15787 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
Abstract: PURPOSE: A method of fabricating a semiconductor package and a semiconductor package are provided to increase bonding force by a solder film on the surface of a pads between a semiconductor chip and a housing board. CONSTITUTION: A first substrate(1) in which a first pad(2) is formed is prepared. The first pad is formed with titanium, nickel, and metal such as platinum and gold. The first pad and a bump(3) constitute a first terminal(50). A solder particle(5) is comprised of lead, tin, indium, bismuth, antimony, silver or alloy using them.
Abstract translation: 目的：提供一种制造半导体封装和半导体封装的方法，以通过在半导体芯片和壳体板之间的焊盘的表面上的焊料膜增加焊接力。 构成：准备形成有第一垫（2）的第一基板（1）。 第一垫由钛，镍和金属如铂和金形成。 第一焊盘和凸块（3）构成第一端子（50）。 焊料颗粒（5）由铅，锡，铟，铋，锑，银或合金构成。
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公开(公告)号：KR1020100027726A
公开(公告)日：2010-03-11
申请号：KR1020080086752
申请日：2008-09-03
Applicant: 한국전자통신연구원
IPC: H01L23/049 , H01L23/48
CPC classification number: H01L2924/0002 , H01L2924/15311 , H01L2924/00
Abstract: PURPOSE: A vertical connector, a semiconductor package including the same and a method for manufacturing the vertical connector and the semiconductor package are provided to effectively realize the semiconductor package by covering a solder pillar with a polymeric resin. CONSTITUTION: Metal plates are prepared. A mixture is provided between the metal plates. The mixture includes a solder ball and a polymeric resin. The solder ball is melted to form a conductive pillar(106) between the metal plates. The polymeric resin is hardened to form an insulation pillar(110) between the conductive pillars. The metal plates are removed.
Abstract translation: 目的：提供一种垂直连接器，包括其的半导体封装件和用于制造垂直连接器和半导体封装件的方法，以通过用聚合物树脂覆盖焊料柱来有效地实现半导体封装。 规定：准备金属板。 在金属板之间设置混合物。 混合物包括焊球和聚合物树脂。 焊球被熔化以在金属板之间形成导电柱（106）。 聚合物树脂被硬化以在导电柱之间形成绝缘柱（110）。 拆下金属板。
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公开(公告)号：KR1020100007690A
公开(公告)日：2010-01-22
申请号：KR1020090011106
申请日：2009-02-11
Applicant: 한국전자통신연구원
CPC classification number: C09J11/06 , C08K3/04 , C08K3/08 , C09J9/02 , C09J11/00 , C09J11/04 , C09J201/00 , H05K3/34
Abstract: PURPOSE: An anisotropic conductive adhesive composition is provided to improve the wettability of the surface of conductive pattern, to impart excellent electrical characteristic to an electronic device, and to easily restore a damaged contact unit. CONSTITUTION: An anisotropic conductive adhesive composition comprises a low melting solder(136), a thermosetting polymer resin, and a curing agent of an anhydride-based material. The thermosetting polymer resin comprises a hydroxyl group and the low melting solder actuates as a curing catalyst. The composition further comprises a deforming agent for reducing the surface tension of the thermosetting polymer resin.
Abstract translation: 目的：提供各向异性导电粘合剂组合物以改善导电图案的表面的润湿性，从而赋予电子设备优异的电特性，并且容易地恢复损坏的接触单元。 构成：各向异性导电粘合剂组合物包含低熔点焊料（136），热固性聚合物树脂和基于酸酐的材料的固化剂。 热固性聚合物树脂包含羟基，低熔点焊料作为固化催化剂起作用。 组合物还包含用于降低热固性聚合物树脂的表面张力的变形剂。
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