초고주파 집적회로용 고충실도 다결정 실리콘 캐패시터
    1.
    发明授权
    초고주파 집적회로용 고충실도 다결정 실리콘 캐패시터 失效
    초고주파집적회로용고충실도다결정실리콘캐패시터

    公开(公告)号:KR100415547B1

    公开(公告)日:2004-01-24

    申请号:KR1020010047553

    申请日:2001-08-07

    Abstract: PURPOSE: A high-Q poly-to-poly capacitor structure for RF ICs is provided to reduce an area of a lower electrode plate to lower parasitic capacitance by using an interdigit structure. CONSTITUTION: A lower electrode plate(23) of a capacitor is formed on a silicon substrate(21). The lower electrode plate(23) is formed with the first polysilicon layer. An upper electrode plate(25) is formed on the lower electrode plate(23). The upper electrode plate(25) is formed with the second polysilicon layer. The upper electrode plate(25) is connected with the first metal layer(28) through a plurality of contacts(27). A contact/the first metal layer/via layer(27/28/29) are sequentially laminated on the lower electrode plate(23). The second metal layer(31) is connected with the via layer(29). The first and the second metal layers(28,31) are connected to each other by using the via layer(29). The lower electrode plate(23) and the upper electrode plate(25) are formed within silicon oxide layers(22,24,26,30). The contact(29) and the first metal layer(28) are formed within the silicon oxide layers(22,24,26,30).

    Abstract translation: 目的:提供用于RF IC的高Q多对多电容器结构,以通过使用叉指结构来减小下电极板的面积以降低寄生电容。 构成:在硅基板(21)上形成电容器的下部电极板(23)。 下电极板(23)形成有第一多晶硅层。 上电极板(25)形成在下电极板(23)上。 上电极板(25)形成有第二多晶硅层。 上电极板(25)通过多个触点(27)与第一金属层(28)连接。 接触/第一金属层/通孔层(27/28/29)顺序层叠在下电极板(23)上。 第二金属层(31)与通孔层(29)连接。 第一和第二金属层(28,31)通过使用通孔层(29)彼此连接。 下电极板(23)和上电极板(25)形成在氧化硅层(22,24,26,30)内。 触点(29)和第一金属层(28)形成在氧化硅层(22,24,26,30)内。

    초고주파 집적회로용 고충실도 다결정 실리콘 캐패시터
    2.
    发明公开
    초고주파 집적회로용 고충실도 다결정 실리콘 캐패시터 失效
    射频IC的高Q聚对多电容结构

    公开(公告)号:KR1020030013195A

    公开(公告)日:2003-02-14

    申请号:KR1020010047553

    申请日:2001-08-07

    Abstract: PURPOSE: A high-Q poly-to-poly capacitor structure for RF ICs is provided to reduce an area of a lower electrode plate to lower parasitic capacitance by using an interdigit structure. CONSTITUTION: A lower electrode plate(23) of a capacitor is formed on a silicon substrate(21). The lower electrode plate(23) is formed with the first polysilicon layer. An upper electrode plate(25) is formed on the lower electrode plate(23). The upper electrode plate(25) is formed with the second polysilicon layer. The upper electrode plate(25) is connected with the first metal layer(28) through a plurality of contacts(27). A contact/the first metal layer/via layer(27/28/29) are sequentially laminated on the lower electrode plate(23). The second metal layer(31) is connected with the via layer(29). The first and the second metal layers(28,31) are connected to each other by using the via layer(29). The lower electrode plate(23) and the upper electrode plate(25) are formed within silicon oxide layers(22,24,26,30). The contact(29) and the first metal layer(28) are formed within the silicon oxide layers(22,24,26,30).

    Abstract translation: 目的:提供用于RF IC的高Q多聚电容器结构,以通过使用叉指结构来减小下电极板的面积以降低寄生电容。 构成:在硅衬底(21)上形成电容器的下电极板(23)。 下电极板(23)形成有第一多晶硅层。 上电极板(25)形成在下电极板(23)上。 上电极板(25)形成有第二多晶硅层。 上电极板(25)通过多个触点(27)与第一金属层(28)连接。 接触/第一金属层/通孔层(27/28/29)依次层压在下电极板(23)上。 第二金属层(31)与通孔层(29)连接。 第一和第二金属层(28,31)通过使用通孔层(29)彼此连接。 下电极板(23)和上电极板(25)形成在氧化硅层(22,24,26,30)内。 接触(29)和第一金属层(28)形成在氧化硅层(22,24,26,30)内。

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