Abstract:
PROBLEM TO BE SOLVED: To provide a wafer which is a semiconductor wafer of which surfaces on both sides can be polished to any degree. SOLUTION: One side of a semiconductor wafer is polished to comparatively higher degree that is suitable for making a fine pattern by a lithography process, and the other side thereof is polished to comparatively low degree, that is appropriate to provide alignment marks WM3 and WM4 effective for arranging wafers in the lithography process. COPYRIGHT: (C)2006,JPO&NCIPI
Abstract:
PROBLEM TO BE SOLVED: To provide a device manufacturing method which can print on one side of a substrate with improved precision after aligning the substrate by referring to the markers provided on the other side of the substrate without using additional hardware. SOLUTION: This device manufacturing method comprises a process of preparing a first substrate W having a first surface 10a and a second surface 10b, a process of forming a pattern composed of at least one inversion alignment marking (1-8) on the first surface of the first substrate, a process of providing a protective layer 11 on the alignment marking, a process of joining the first surface of the first substrate to a second substrate CW, a process of locally etching the first substrate to the protective layer to form a trench 17 around the inversion alignment marking, and a process of using a lithographic projection apparatus having a front/rear alignment unit to align the substrates by referring to the alignment marking which is enclosed by the trench and to form at least one patterned layer 15 on the second surface. COPYRIGHT: (C)2004,JPO
Abstract:
PROBLEM TO BE SOLVED: To provide a technique capable of positioning a 2nd substrate joined to the top surface of a 1st substrate which has a thickness of >100 μm and is preferably pattern-formed and implementing the positioning at reduced cost within a limited time. SOLUTION: A forming method is provided for a junction substrate including a stage of providing the 1st substrate which has a 1st substrate shape and also has at least alignment mark disposed on a 1st surface side. A 2nd substrate is provided having the 2nd substrate shape. The 2nd substrate is directed in a designated direction to the 1st substrate. The 2nd substrate is joined to the 1st surface side of the 1st substrate, so that the 2nd substrate which is joined does not cover at least one 1st alignment mark, thus providing the junction substrate. COPYRIGHT: (C)2006,JPO&NCIPI
Abstract:
PROBLEM TO BE SOLVED: To provide a measuring method, a method of providing an alignment mark and to provide a device manufacturing method. SOLUTION: According to the measuring method by one embodiment, the relative mark between the provisional alignment mark of one surface in a substrate and the alignment mark of the other surface thereof is determined, and the provisional alignment mark is removed. Prior to the removal of the provisional alignment mark, the relative position between the provisional alignment mark and the other mark on the same surface of the substrate can be determined. The provisional alignment mark, for example, can be formed on an oxide layer on the substrate. COPYRIGHT: (C)2005,JPO&NCIPI
Abstract:
PROBLEM TO BE SOLVED: To provide a method for analyzing the behavior of front side marks on a substrate, during a process of manufacturing a device, without the need for etching global alignment marks. SOLUTION: A plurality of front-side marks are manufactured on the front side of a substrate by a method for manufacturing a device, and these marks are used to locally align the substrate during exposure. After a certain number of processing steps, the positions of the front side marks are measured and compared with respect to their original positions. Next, the change, that is, their behavior, can be analyzed in the measured positions of the front side marks. The original positions and actual positions thereof are defined, with respect to a nominal grid which is defined by using global alignment marks which are positioned at the back side of the substrate. Because the global alignment marks are positioned on the back side, they will not be affected by any processing step. COPYRIGHT: (C)2007,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide a positioning-mark providing method, a substrate-positioning method, a device manufacturing method, a computer program, and a device. SOLUTION: In one embodiment, a first and second set positioning marks are etched on the first surface of a substrate. The first set-positioning mark is located at one or plurality of positions so that these marks appear in the object window of the front/back positioning optical system of a first lithography apparatus, and one or plurality of positions of positioning mark of a second set are selected, based on the location of a positioning device of another lithography apparatus. When the substrate is reversed and the positioning is carried out, using the positioning mark of the first set and the front/back positioning optical system, the positioning marks of third and fourth of sets are etched at the positions directly opposite to the positioning marks of the first and second sets, respectively. COPYRIGHT: (C)2006,JPO&NCIPI
Abstract:
PROBLEM TO BE SOLVED: To provide an improved method to measure the relative location of a plurality of patterns produced on a substrate. SOLUTION: This method is to measure the relative position of the patterns produced on the substrate by a step mode, using a reference mark overlaid on the device pattern. In this specification, a mark of the lithography apparatus including the reference mark to use in the method is also disclosed. COPYRIGHT: (C)2004,JPO&NCIPI
Abstract:
PROBLEM TO BE SOLVED: To project a pattern onto an upper surface of a substrate, the pattern to be aligned to an alignment mark on a lower surface of the substrate, when patterned layers are provided on both faces of a substrate. SOLUTION: A calibration method for a lithographic device aligning top and back surfaces is disclosed, the method comprising: attaching a substrate having a plurality of alignment marks to a carrier with the alignment marks opposing to the carrier; reducing the thickness of the substrate; measuring the position of an alignment mark image formed by an optical system in a substrate table of the apparatus by using an alignment system of the apparatus; projecting a pattern onto the substrate at a position of the pattern determined by the measured position of the alignment mark; measuring the position of an alignment mark provided in the opposite face of the substrate to the projected pattern, the measurement of the position of the alignment mark on the opposite side of the substrate being carried out by an alignment system that induces radiation through the substrate; and comparing the measured positions to determine an overlay error. COPYRIGHT: (C)2009,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide a pattern onto a non-traditional substrate by a novel method with use of a novel substrate carrier and a substrate carrier. SOLUTION: According to one of the aspects of the present invention there is provided a substrate carrier arranged to hold a substrate in a given position using a vacuum, the vacuum being established in a sealed space created between the substrate carrier and the substrate. According to a second aspect, there is provided a method of removably securing a substrate to a substrate carrier, including: positioning a substrate on the substrate carrier so that a sealed space can be defined between the substrate and the substrate carrier; and establishing a vacuum in the space between the substrate and the substrate carrier. COPYRIGHT: (C)2008,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide a method and a system for three-dimensional alignment for wafer scale integration. SOLUTION: A board bonding system is provided with first and second board tables to hold first and second boards, and a controller. The first board is equipped with a first device having a first contact pad, and the second board is equipped with a second device having a second contact pad. The wafer bonding system is designed to conduct bonding of the first and second devices so that a circuit can be formed by the first and second devices. First and second board tables ST and STb are respectively provided with a position sensor to measure optical signals generating on alignment markers WM1, WM1', WM2, and WM2', and WM1b, WM1b', WM2b and WM2b' of the first and second boards. Furthermore, they are provided with first and second actuators ACT and ACTb to change the position and the orientation of the respective board tables. COPYRIGHT: (C)2006,JPO&NCIPI