公开(公告)号：JP2004319983A

公开(公告)日：2004-11-11

申请号：JP2004085745

申请日：2004-03-23

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： CHEN HUAJIE ,  SUBBANNA SESHADRI ,  JAGANNATHAN BASANTH ,  GREGORY G FREEMAN ,  AHLGREN DAVID C ,  ANGELL DAVID ,  SCHONENBERG KATHRYN T ,  STEIN KENNETH J ,  JAMIN FEN F

IPC: H01L21/331 ,  H01L21/8249 ,  H01L27/06 ,  H01L29/732 ,  H01L29/737 ,  H01L29/78

CPC classification number: H01L21/8249 ,  H01L27/0623

Abstract: PROBLEM TO BE SOLVED: To provide a method for forming a BiCMOS integrated circuit having a raised external base.
SOLUTION: This method comprises a step for forming a polycrystal silicon layer on the surface of a gate dielectric substance 18 provided on a substrate having a device section 14 in which a bipolar transistor is formed and a device section 16 in which a CMOS transistor is formed. Then, the polycrystal silicon layer is patterned, and a sacrifice polycrystal silicon layer is formed above the device section in which the bipolar transistor is formed and the section around it. Meanwhile, a gate conductor is provided in the device section in which the CMOS transistor is formed at the same time. Then, a spacer 30 is provided around each of the gate conductor. Then a part of the sacrifice polycrystal silicon layer on the bipolar device section is selectively removed to provide an opening in the device section in which the bipolar transistor is formed. Then the bipolar transistor having a raised external base 58 is formed at the opening.
COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种用于形成具有凸起的外部基底的BiCMOS集成电路的方法。 解决方案：该方法包括在设置在其上形成有双极晶体管的器件部分14的衬底上的栅极电介质18的表面上形成多晶硅层的步骤，以及器件部分16，其中CMOS 形成晶体管。 然后，对多晶硅层进行构图，在形成双极型晶体管的器件部分上方形成牺牲多晶硅层，并在其周围形成截面。 同时，在同时形成CMOS晶体管的器件部分中提供栅极导体。 然后，围绕每个栅极导体设置间隔件30。 然后，选择性地去除双极器件部分上牺牲多晶硅层的一部分，以在其中形成双极晶体管的器件部分中提供开口。 然后在开口处形成具有升高的外部基座58的双极晶体管。 版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2004006310A

公开(公告)日：2004-01-08

申请号：JP2003109122

申请日：2003-04-14

Applicant: IBM

Inventor： VOLANT RICHARD P ,  ANGELL DAVID ,  CANAPERI DONALD F ,  KOCIS JOSEPH T ,  PETRARCA KEVIN S ,  STEIN KENNETH JAY ,  WILLE WILLIAM C

IPC: B81B3/00 ,  B81C1/00 ,  H01H49/00 ,  H01H59/00

Abstract: PROBLEM TO BE SOLVED: To provide a structure and a manufacturing method of a microelectric mechanical switch (MEMS) device provided with a self-alignment spacer or a bump. SOLUTION: The spacers arranged having the optimum size so as to make to the minimum a problem caused by stiction by functioning as restricting mechanism concerning the switch are designed. The spacers are manufactured by using the typically standard semi-conductor technology used for manufacturing a CMOS device. This method to manufacture these spacers does not need an additional deposition, excessive lithography process, and an additional etching. COPYRIGHT: (C)2004,JPO

公开(公告)号：AT549741T

公开(公告)日：2012-03-15

申请号：AT04723639

申请日：2004-03-26

Applicant: IBM

Inventor： ANGELL DAVID ,  BEAULIEU FREDERIC ,  HISADA TAKASHI ,  KELLY ADREANNE ,  MCKNIGHT SAMUEL ,  MIYAI HIROMITSU ,  PETRARCA KEVIN ,  SAUTER WOLFGANG ,  VOLANT RICHARD ,  WEINSTEIN CAITLIN

IPC: H01L21/60 ,  H01L23/485