公开(公告)号：WO2011064372A3

公开(公告)日：2011-08-11

申请号：PCT/EP2010068435

申请日：2010-11-29

Applicant: IBM ,  IBM UK ,  ROSSNAGEL STEPHEN ,  CABRAL JR CYRIL ,  MURRAY CONAL EUGENE ,  WISNIERFF ROBERT LUKE ,  KOESTER STEVEN JOHN ,  RODBELL KENNETH PARKER ,  GORDON MICHAEL ,  YAU JENG-BANG

Inventor： ROSSNAGEL STEPHEN ,  CABRAL JR CYRIL ,  MURRAY CONAL EUGENE ,  WISNIERFF ROBERT LUKE ,  KOESTER STEVEN JOHN ,  RODBELL KENNETH PARKER ,  GORDON MICHAEL ,  YAU JENG-BANG

IPC: G01T1/02

CPC classification number: G01T1/026

Abstract: A system for determining an amount of radiation includes a dosimeter configured to receive the amount of radiation, the dosimeter comprising a circuit having a resonant frequency, such that the resonant frequency of the circuit changes according to the amount of radiation received by the dosimeter, the dosimeter further configured to absorb RF energy at the resonant frequency of the circuit; a radio frequency (RF) transmitter configured to transmit the RF energy at the resonant frequency to the dosimeter; and a receiver configured to determine the resonant frequency of the dosimeter based on the absorbed RF energy, wherein the amount of radiation is determined based on the resonant frequency.

Abstract translation: 用于确定辐射量的系统包括配置成接收辐射量的剂量计，剂量计包括具有谐振频率的电路，使得电路的谐振频率根据剂量计接收的辐射量而变化， 剂量计进一步被配置为吸收电路的谐振频率处的RF能量; 射频（RF）发射器，其被配置为将所述谐振频率处的所述RF能量发射到所述剂量计; 以及接收器，被配置为基于吸收的RF能量确定剂量计的谐振频率，其中基于谐振频率确定辐射量。

公开(公告)号：WO2009101040A2

公开(公告)日：2009-08-20

申请号：PCT/EP2009051427

申请日：2009-02-09

Applicant: IBM ,  IBM UK ,  CABRAL JR CYRIL ,  RODBELL KENNETH PARKER ,  BAKER BRETT CAROLINE ,  HUANG QIANG

Inventor： CABRAL JR CYRIL ,  RODBELL KENNETH PARKER ,  BAKER BRETT CAROLINE ,  HUANG QIANG

IPC: H01L21/768 ,  H01L23/532

CPC classification number: H01L21/76877 ,  H01L21/76873 ,  H01L23/53233 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Cobalt is added to a copper seed layer, a copper plating layer, or a copper capping layer in order to modify the microstructure of copper lines and vias. The cobalt can be in the form of a copper-cobalt alloy or as a very thin cobalt layer. The grain boundaries configured in bamboo microstructure in the inventive metal interconnect structure shut down copper grain boundary diffusion. The composition of the metal interconnect structure after grain growth contains from about 1 ppm to about 10 % of cobalt in atomic concentration. Grain boundaries extend from a top surface of a copper-cobalt alloy line to a bottom surface of the copper-cobalt alloy line, and are separated from any other grain boundary by a distance greater than a width of the copper-cobalt alloy line.

Abstract translation: 钴添加到铜种子层，铜镀层或铜覆盖层以改变铜线和过孔的微观结构。 钴可以是铜钴合金的形式或非常薄的钴层。 在本发明金属互连结构中的竹微结构中配置的晶界关闭了铜晶界扩散。 晶粒生长后的金属互连结构的组成包含约1ppm至约10％的原子浓度的钴。 晶界从铜钴合金线的上表面延伸到铜钴合金线的下表面，并且与任何其他晶界分开大于铜钴合金线的宽度的距离。

公开(公告)号：JP2000174027A

公开(公告)日：2000-06-23

申请号：JP34316599

申请日：1999-12-02

Applicant: IBM

Inventor： ANDRICACOS PANAYOTIS CONSTANTI ,  CABRAL JR CYRIL ,  CHRISTOPHER CARL PARKS ,  RODBELL KENNETH P ,  ROGER EN-RUEN TSUAI

IPC: H01L21/3205 ,  H01L21/265 ,  H01L21/283 ,  H01L21/288 ,  H01L21/768 ,  H01L23/52 ,  H01L23/532

Abstract: PROBLEM TO BE SOLVED: To improve the electromigration resistance characteristic by depositing a Cu seed layer to a housing region and implanting ions of a impurity selected among C, O, Cl, S and N in the seed layer. SOLUTION: In a simple damascene, a dopant ion is implanted in a Cu-rich conductive layer 90 before planarizing, the dopant is selected among C, O, Cl, S and N, a silicon nitride etch-planarize stop layer 92, a barrier layer 94 and a Cu seed layer 96 are formed in trenches formed on a semiconductor wafer or the side walls and top faces of openings, the ion implanting in the Cu conductive layer 90 is made in the single damascene process after the planarize stop, and the dopant brings about a microstructure unique to a conductor contg. large crystal grains, thereby improving the electromigration resistance characteristic.

公开(公告)号：JP2004158897A

公开(公告)日：2004-06-03

申请号：JP2004063897

申请日：2004-03-08

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： ANDRICACOS PANAYOTIS CONSTANTI ,  CABRAL JR CYRIL ,  CHRISTOPHER CARL PARKS ,  RODBELL KENNETH P ,  ROGER EN-RUEN TSUAI

IPC: H01L21/3205 ,  H01L21/265 ,  H01L21/283 ,  H01L21/288 ,  H01L21/768 ,  H01L23/52 ,  H01L23/532

CPC classification number: H01L21/76843 ,  H01L21/2885 ,  H01L21/76855 ,  H01L21/76858 ,  H01L21/76859 ,  H01L21/76864 ,  H01L21/76873 ,  H01L21/76877 ,  H01L21/76883 ,  H01L21/76886 ,  H01L23/53233 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To improve electromigration resistance of a copper electric conductor. SOLUTION: Impurities which improve the electromigraion resistance are added to the copper electric conductor after copper composition is deposited on inside a holding place. The impurities are C, O, C1, S and N, and a concentration level of the impurities is about 0.01ppm or about 1,000ppm. The impurities are made by electroplating copper after copper seed is deposited on inside the holding place and ion is implanted, or by electrodepositing the copper composition including the impurities and diffusing the impurities inside the copper seed layer after the copper layer is deposited, or by implanting dopant ion after the deposition of a barrier layer and then depositing the copper seed layer. Annealing is performed for diffusion. After the copper electric conductor is planarized, at least one element is ion-implanted into these surface layers. COPYRIGHT: (C)2004,JPO

Abstract translation: 要解决的问题：提高铜导体的电迁移能力。 解决方案：将铜组合物沉积在保持位置之后，将改善耐电阻性的杂质加入到铜导电体中。 杂质为C，O，Cl，S和N，杂质浓度为约0.01ppm或约1,000ppm。 杂质通过将铜种子沉积在保持位置的内部并离子注入之后，或者通过电沉积包含杂质的铜组合物并在铜层沉积之后在铜籽晶层内扩散杂质，或通过植入 在沉积阻挡层之后然后沉积铜籽晶层的掺杂剂离子。 退火进行扩散。 在铜电导体平坦化之后，将至少一种元素离子注入到这些表面层中。 版权所有（C）2004，JPO

公开(公告)号：JPH1154454A

公开(公告)日：1999-02-26

申请号：JP19988497

申请日：1997-07-25

Applicant: IBM

Inventor： CABRAL JR CYRIL ,  LAWRENCE ALFRED CLEVENGER ,  FRANCOIS MAXDOLE ,  HARPER JAMES M E ,  MANN RANDY W ,  GLENN LESTER MILES ,  NAKOS JAMES S ,  RONEN ANDREW ROY ,  CATHERINE L SAENGER

IPC: C22C14/00 ,  C30B3/00 ,  H01L21/28

Abstract: PROBLEM TO BE SOLVED: To provide an improved method for forming a C54 phase titanium silicide without requiring a second high-temperature annealing. SOLUTION: A low resistivity titanium silicide and semiconductor devices incorporating the same are formed by a titanium alloy comprising titanium and 1-20 atom percent refractory metal deposited in a layer overlying a silicon substrate. The substrate is then heated to a temperature which is sufficient to practically form a C54 phase titanium silicide. The titanium alloy may further comprise silicon and the refractory metal may be Mo, W, Ta, Nb, V, or Cr, but more preferably be Ta or Nb. The heating step used to form the low resistivity titanium silicide is performed at a temperature less than 900 deg.C, and more preferably between about 600 to 700 deg.C.