公开(公告)号：GB2581082A

公开(公告)日：2020-08-05

申请号：GB202005861

申请日：2018-11-01

Applicant: IBM

Inventor： TAKASHI ANDO ,  CHIH-CHAO YANG ,  BENJAMIN BRIGGS ,  MICHAEL RIZZOLO ,  LAWRENCE CLEVENGER

IPC: H01L45/00

Abstract: A method is presented for forming a semiconductor device. The method includes depositing an insulating layer over a semiconductor substrate, etching the insulating layer to form a plurality of trenches for receiving a first conducting material, forming a resistive switching memory element over at least one trench of the plurality of trenches, the resistive switching memory element having a conducting cap formed thereon, and depositing a dielectric cap over the trenches. The method further includes etching portions of the insulating layer to expose a section of the dielectric cap formed over the resistive switching memory element, etching the exposed section of the dielectric cap to expose the conducting cap of the resistive switching memory element, and forming a barrier layer in direct contact with the exposed section of the conducting cap.

公开(公告)号：GB2549621A

公开(公告)日：2017-10-25

申请号：GB201706263

申请日：2016-01-04

Applicant: IBM

Inventor： HONG HE ,  JUNLI WANG ,  CHIH-CHAO YANG ,  JUNTAO LI

IPC: H01L21/8234 ,  H01L21/28

Abstract: A method of fabricating a replacement metal gate in a transistor device, a fin field effect transistor (finFET), and a method of fabricating a finFET device with the replacement metal gate are described. The method of fabricating the replacement metal gate includes forming a dummy gate structure (140) over a substrate (110), the dummy gate structure (140) being surrounded by an insulating layer (120), and removing the dummy gate structure (140) so as to expose a trench (121) within the insulating layer (120). The method also includes conformally depositing a dielectric material layer (160) and a work function metal layer (170) over the insulating layer (120) and in the trench (121) and removing the dielectric material layer (160) and the work function metal layer (170) from a tip surface of the insulating layer (120), recessing the work function metal layer (170) below a top of the trench (121), and selectively forming a gate metal (190) only on exposed surfaces of the work function metal layer (170).

公开(公告)号：GB2581082B

公开(公告)日：2022-07-06

申请号：GB202005861

申请日：2018-11-01

Applicant: IBM

Inventor： TAKASHI ANDO ,  CHIH-CHAO YANG ,  BENJAMIN BRIGGS ,  MICHAEL RIZZOLO ,  LAWRENCE CLEVENGER

IPC: H01L45/00 ,  G11C11/56 ,  G11C13/00 ,  H01L27/24

Abstract: A method is presented for forming a semiconductor device. The method includes depositing an insulating layer over a semiconductor substrate, etching the insulating layer to form a plurality of trenches for receiving a first conducting material, forming a resistive switching memory element over at least one trench of the plurality of trenches, the resistive switching memory element having a conducting cap formed thereon, and depositing a dielectric cap over the trenches. The method further includes etching portions of the insulating layer to expose a section of the dielectric cap formed over the resistive switching memory element, etching the exposed section of the dielectric cap to expose the conducting cap of the resistive switching memory element, and forming a barrier layer in direct contact with the exposed section of the conducting cap.

公开(公告)号：GB2601056A

公开(公告)日：2022-05-18

申请号：GB202114896

申请日：2021-10-19

Applicant: IBM

Inventor： JIM SHIH-CHUN LIANG ,  BAOZHEN LI ,  CHIH-CHAO YANG

IPC: H01L23/522

Abstract: The integrated circuit structure includes back end of line (BEOL) wiring layers and capacitor plates (306, 310, 314, 318, 322) formed in an interlayer dielectric device layer. Some of the capacitor electrodes may be formed from the same material as the wiring layers. The capacitor may include multiple interleaved electrode plates that are interconnected by conductive vias 428. The capacitor dielectric layers (316, 320) are formed from high dielectric constant materials such as La2O, ZrO2, and HfO2.

公开(公告)号：GB2549621B

公开(公告)日：2018-06-13

申请号：GB201706263

申请日：2016-01-04

Applicant: IBM

Inventor： HONG HE ,  JUNLI WANG ,  CHIH-CHAO YANG ,  JUNTAO LI

IPC: H01L21/8234 ,  H01L21/28

Abstract: A method of fabricating a replacement metal gate in a transistor device, a fin field effect transistor (finFET), and method of fabricating a finFET device with the replacement metal gate are described. The method of fabricating the replacement metal gate includes forming a dummy gate structure over a substrate, the dummy gate structure being surrounded by an insulating layer, and removing the dummy gate structure so as to expose a trench within the insulating layer. The method also includes conformally depositing a dielectric material layer and a work function metal layer over a the insulating layer and in the trench and removing the dielectric material layer and the work function metal layer from a tip surface of the insulating layer, recessing the work function metal layer below a top of the trench, and selectively forming a gate metal only on exposed surfaces of the work function metal layer