Abstract:
A semiconductor structure is provided that includes an interconnect structure and a fuse structure located in different areas, yet within the same interconnect level. The interconnect structure has high electromigration resistance, while the fuse structure has a lower electromigration resistance as compared with the interconnect structure. The fuse structure includes a conductive material embedded within an interconnect dielectric in which the upper surface of the conductive material has a high concentration of oxygen present therein. A dielectric capping layer is located atop the dielectric material and the conductive material. The presence of the surface oxide layer at the interface between the conductive material and the dielectric capping layer degrades the adhesion between the conductive material and the dielectric capping layer. As such, when current is provided to the fuse structure electromigration of the conductive material occurs and over time an opening is formed in the conductive material blowing the fuse element.
Abstract:
DISCONTINUOUS/NON-UNIFORM METAL CAP STRUCTURE AND PROCESS FOR INTERCONNECT INTEGRATIONAbstractAn interconnect structure including a noble metal-containing cap that is present at least on some portion of an upper surface of at least one conductive material that is embedded within an interconnect dielectric material is provided. In one embodiment, the noble metal-containing cap is discontinuous, e.g., exists as nuclei or islands on the surface of the at least one conductive material. In another embodiment, the noble metal-containing cap has a non-uniform thickness across the surface of the at least one conductive material.Fig. 4E
Abstract:
A semiconductor device containing a diffusion barrier layer is provided. The semiconductor device includes at least a semiconductor substrate containing conductive metal elements; and, a diffusion barrier layer applied to at least a portion of the substrate in contact with the conductive metal elements, the diffusion barrier layer having an upper surface and a lower surface and a central portion, and being formed from silicon, carbon, nitrogen and hydrogen with the nitrogen being non-uniformly distributed throughout the diffusion barrier layer. Thus, the nitrogen is more concentrated near the lower and upper surfaces of the diffusion barrier layer as compared to the central portion of the diffusion barrier layer. Methods for making the semiconductor devices are also provided.
Abstract:
A semiconductor device contains a diffusion barrier layer 14a, 14b, 14c. The semiconductor device preferably includes a semiconductor substrate 8 and a dielectric layer 10 containing conductive metal elements 12; and the diffusion barrier layer 14 is applied to at least a portion of the substrate in contact with the conductive metal elements, the diffusion barrier layer being formed from silicon, carbon, nitrogen and hydrogen with the nitrogen being non-uniformly distributed throughout the diffusion barrier layer. Thus, the nitrogen is typically more concentrated near the lower and upper surfaces 14a, 14b of the diffusion barrier layer as compared to the central portion 14c of the diffusion barrier layer. It is found that this process leads to improved adhesion of the diffusion barrier layer, but without raising the dielectric constant too much. The diffusion barrier layer may also include oxygen. The diffusion barrier layer may be formed by atomic layer deposition or by PECVD.
Abstract:
A semiconductor device containing a diffusion barrier layer is provided. The semiconductor device includes at least a semiconductor substrate containing conductive metal elements; and, a diffusion layer applied to at least a portion of the substrate in contact with the conductive metal elements, the diffusion barrier layer having an upper surface and a lower surface and a central portion, and being formed from silicon, carbon, nitrogen and hydrogen with the nitrogen being non-uniformly distributed throughout the diffusion barrier layer. Thus, the nitrogen is more concentrated near the lower and upper surfaces of the diffusion barrier layer as compared to the central portion of the diffusion barrier layer. Methods for making the semiconductor devices are also provided.