公开(公告)号：EP1371091A4

公开(公告)日：2009-04-01

申请号：EP01990800

申请日：2001-12-04

Applicant: IBM

Inventor： GATES STEPHEN MCCONNELL ,  HEDRICK JEFFREY CURTIS ,  NITTA SATYANARAYANA V ,  PURUSHOTHAMAN SAMPATH ,  TYBERG CHRISTY SENSENICH

IPC: H01L23/48 ,  H01L21/4763 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L21/76835 ,  H01L21/76811 ,  H01L23/5222 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A low-k dielectric metal conductor interconnect structure having no micro-trenches present therein and a method of forming such a structure are provided. The control over the conductor resistance is obtained using a buried etch stop layer (56) having a second atomic composition located between the line and via dielectric layers (54', 58') of porous low-k dielectrics having a first atomic composition. The inventive interconnect structure also includes a hard mask (60) which assists in forming the interconnect structure of the dual damascene-type. The first and second composition are selected to obtain etch selectivity of at least 10 to 1 or higher, and are selected from specific groups of porous low-k organic or inorganic materials with specific atomic compositions and other discoverable quantities.

公开(公告)号：EP1371090A4

公开(公告)日：2007-10-24

申请号：EP01990106

申请日：2001-12-10

Applicant: IBM

Inventor： GATES STEPHEN MCCONNELL ,  HEDRICK JEFFREY CURTIS ,  NITTA SATYANARAYANA V ,  PURUSHOTHAMAN SAMPATH ,  TYBERG CHRISTY SENSENICH

IPC: H01L21/312 ,  H01L21/768 ,  H01L23/522 ,  H01L21/4763 ,  H01L23/48

CPC classification number: H01L21/76835 ,  H01L21/02118 ,  H01L21/02126 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02282 ,  H01L21/3124 ,  H01L21/76811

Abstract: A metal wiring plus low-k dielectric interconnect structure of the dual damascene-type is provided wherein the conductive metal lines and vias are built into a hybrid low-k dielectric which includes two spun-on dielectrics that have different atomic compositions and at least one of the two spun-on dielectrics is porous. The two spun-on dielectrics used in forming the inventive hybrid low-k dielectric each have a dielectric constant of about 2.6 or less, preferably each dielectric of the hybrid structure has a k of from about 1.2 to about 2.2. By utilizing the inventive hybrid low-k dielectric excellent control over metal line resistance (trench depth) is obtained, without no added cost. This is achieved without the use of a buried etch stop layer, which if present, would be formed between the two spun-on dielectrics. Moreover, the spun-on dielectrics of the hybrid low-k dielectric have distinctly different atomic compositions enabling control over the conductor resistance using the bottom spun-on dielectric (i.e., via dielectric) as an inherent etch stop layer for the upper spun-on dielectric (i.e., line dielectric).

公开(公告)号：JP2002270612A

公开(公告)日：2002-09-20

申请号：JP2002037664

申请日：2002-02-15

Applicant: IBM

Inventor： FORNOF ANN RHEA-HELENE ,  GATES STEPHEN MCCONNELL ,  HEDRICK JEFFREY CURTIS ,  NITTA SATYANARAYANA V ,  PURUSHOTHAMAN SAMPATH ,  TYBERG CHRISTY SENSENICH

IPC: H01L21/3205 ,  H01L21/28 ,  H01L21/3105 ,  H01L21/311 ,  H01L21/316 ,  H01L21/768

Abstract: PROBLEM TO BE SOLVED: To provide a simple method where cost effect for patterning a mutual connection structure, in which the material subjected to spin-on is used as a hard mask, is high. SOLUTION: By using the material subjected to spin-on processing to the hard mask, a process can be executed by using a single tool, and usage of a single curing step is enhance, which is not normally used in a patterning process of the conventional technique, in which a CVD hard mask is used. Selection of a polishing stop layer (formed on a surface of low k dielectrics), which has permittivity nearly equal to that of dielectrics positioned below is enabled by using spin coating, so that effective permittivity of an obtained structure is not significantly increased. The hard mask used contains, at least two kinds of spin-on dielectric materials having different etching speeds.

公开(公告)号：JP2002319621A

公开(公告)日：2002-10-31

申请号：JP2002035811

申请日：2002-02-13

Applicant: IBM

Inventor： GATES STEPHEN MCCONNELL ,  HEDRICK JEFFREY CURTIS ,  NITTA SATYANARAYANA V ,  PURUSHOTHAMAN SAMPATH ,  TYBERG CRISTY SENSENICH

IPC: H01L21/312 ,  H01L21/316 ,  H01L21/768 ,  H01L23/522

Abstract: PROBLEM TO BE SOLVED: To provide an interconnecting structure containing patterned multilayered spun-on dielectrics, and to provide a method of forming the structure. SOLUTION: The interconnecting structure contains the patterned multilayered spun-on dielectrics 12' formed on the surface of a substrate. The dielectrics 12 are constituted of a lower low-k dielectrics 14', an embedded etch stop layer 16', and an upper low-k dielectric 18'. The dielectrics 14' and 18' have a first composition and the layer 16' has a second composition which is different from the first composition and is covalently coupled with the dielectrics 14' and 18'. The mutual connecting structure also contains a polish stop layer 22' formed on the multilayered spun-on dielectrics 12' and a metal conductive region 34 formed in the dielectrics 12'.

公开(公告)号：JPH10270711A

公开(公告)日：1998-10-09

申请号：JP6991198

申请日：1998-03-19

Applicant: IBM

Inventor： GATES STEPHEN MCCONNELL

IPC: H01L21/336 ,  H01L29/786

Abstract: PROBLEM TO BE SOLVED: To provide a display which is formed on a plastic substrate, and which is more flexible, more light weight, and has larger shock resistance than a prior art display formed on a glass display. SOLUTION: A thin film transistor 50 includes a gate electrode 56, a gate insulator layer 58, a semiconductor channel layer 60 deposited on an upper part of the gate insulator layer 58, an insulating sealing layer deposited on the channel layer 60, a source electrode 66, a drain electrode 66, and a contact layer 64 in contact with at least the channel layer 60 below the source and drain electrodes, all being disposed on a plastic substrate 52. The thin film transistor is usable in a wide region including an image information display and a photosensitive array, by making use of plastic having low glass transition temperature as the substrate.

公开(公告)号：IE20010123A1

公开(公告)日：2001-09-19

申请号：IE20010123

申请日：2001-02-09

Applicant: IBM

Inventor： COHEN STEPHEN ALAN ,  PURUSHOTHAMAN SAMPATH ,  GIGNAC LYNNE M ,  GATES STEPHEN MCCONNELL ,  SIMONYI EVA ,  WILDMAN HORATIO SEYMOUR ,  RESTAINO DARRYL D ,  DALTON TIMOTHY JOSEPH ,  FITZSIMMONS JOHN ANTHONY ,  JAMISON PAUL CHARLES ,  LEE KANG-WOOK

IPC: H01L21/28 ,  H01L21/31 ,  H01L21/316 ,  H01L21/318 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L21/223

Abstract: A semiconductor device containing a diffusion barrier layer is provided. The semiconductor device includes at least a semiconductor substrate containing conductive metal elements; and, a diffusion layer applied to at least a portion of the substrate in contact with the conductive metal elements, the diffusion barrier layer having an upper surface and a lower surface and a central portion, and being formed from silicon, carbon, nitrogen and hydrogen with the nitrogen being non-uniformly distributed throughout the diffusion barrier layer. Thus, the nitrogen is more concentrated near the lower and upper surfaces of the diffusion barrier layer as compared to the central portion of the diffusion barrier layer. Methods for making the semiconductor devices are also provided.

公开(公告)号：DE60232871D1

公开(公告)日：2009-08-20

申请号：DE60232871

申请日：2002-04-30

Applicant: IBM

Inventor： GATES STEPHEN MCCONNELL ,  MURRAY CHRISTOPHER B ,  NITTA SATYANARAYANA V ,  PURUSHOTHAMAN SAMPATH

IPC: H01L21/316 ,  H01L21/312 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532

公开(公告)号：GB2365216B

公开(公告)日：2004-10-13

申请号：GB0102506

申请日：2001-02-01

Applicant: IBM

Inventor： COHEN STEPHEN ALAN ,  DALTON TIMOTHY JOSEPH ,  FITZSIMMONS JOHN ANTHONY ,  GATES STEPHEN MCCONNELL ,  GIGNAC LYNNE M ,  JAMISON PAUL CHARLES ,  LEE KANG-WOOK ,  PURUSHOTHAMAN SAMPATH ,  RESTAINO DARRYL D ,  SIMONYI EVA ,  WILDMAN HORATIO SEYMOUR

IPC: H01L21/28 ,  H01L21/31 ,  H01L21/316 ,  H01L21/318 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L21/314

Abstract: A semiconductor device containing a diffusion barrier layer is provided. The semiconductor device includes at least a semiconductor substrate containing conductive metal elements; and, a diffusion barrier layer applied to at least a portion of the substrate in contact with the conductive metal elements, the diffusion barrier layer having an upper surface and a lower surface and a central portion, and being formed from silicon, carbon, nitrogen and hydrogen with the nitrogen being non-uniformly distributed throughout the diffusion barrier layer. Thus, the nitrogen is more concentrated near the lower and upper surfaces of the diffusion barrier layer as compared to the central portion of the diffusion barrier layer. Methods for making the semiconductor devices are also provided.

公开(公告)号：AU2002303576A1

公开(公告)日：2002-11-18

申请号：AU2002303576

申请日：2002-04-30

Applicant: IBM

Inventor： MURRAY CHRISTOPHER B ,  GATES STEPHEN MCCONNELL ,  PURUSHOTHAMAN SAMPATH ,  NITTA SATYANARAYANA V

IPC: H01L21/312 ,  H01L21/316 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  C04B38/00 ,  C04B41/45

公开(公告)号：GB2365216A

公开(公告)日：2002-02-13

申请号：GB0102506

申请日：2001-02-01

Applicant: IBM

Inventor： COHEN STEPHEN ALAN ,  DALTON TIMOTHY JOSEPH ,  FITZSIMMONS JOHN ANTHONY ,  GATES STEPHEN MCCONNELL ,  GIGNAC LYNNE M ,  JAMISON PAUL CHARLES ,  LEE KANG-WOOK ,  PURUSHOTHAMAN SAMPATH ,  RESTAINO DARRYL D ,  SIMONYI EVA ,  WILDMAN HORATIO SEYMOUR

IPC: H01L21/28 ,  H01L21/31 ,  H01L21/316 ,  H01L21/318 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L21/314

Abstract: A semiconductor device contains a diffusion barrier layer 14a, 14b, 14c. The semiconductor device preferably includes a semiconductor substrate 8 and a dielectric layer 10 containing conductive metal elements 12; and the diffusion barrier layer 14 is applied to at least a portion of the substrate in contact with the conductive metal elements, the diffusion barrier layer being formed from silicon, carbon, nitrogen and hydrogen with the nitrogen being non-uniformly distributed throughout the diffusion barrier layer. Thus, the nitrogen is typically more concentrated near the lower and upper surfaces 14a, 14b of the diffusion barrier layer as compared to the central portion 14c of the diffusion barrier layer. It is found that this process leads to improved adhesion of the diffusion barrier layer, but without raising the dielectric constant too much. The diffusion barrier layer may also include oxygen. The diffusion barrier layer may be formed by atomic layer deposition or by PECVD.