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公开(公告)号:US3458352A
公开(公告)日:1969-07-29
申请号:US3458352D
申请日:1966-08-15
Applicant: IBM
Inventor: DIETSCH HANS E , GOW JOHN , SURTY ROHINTON J
CPC classification number: H01C17/06533 , F27D11/02 , H01C17/065 , H01C17/30 , Y10T29/49099
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公开(公告)号:DE68920944T2
公开(公告)日:1995-08-10
申请号:DE68920944
申请日:1989-08-24
Applicant: IBM
Inventor: BICKFORD HARRY RANDALL , BREGMAN MARK FIELDING , CIPOLLA THOMAS MARIO , GOW JOHN , LEDERMANN PETER GERARD , MIERSCH EKKEHARD FRITZ , OLSON LEONARD THEODORE , PAGNINI DAVID PETER , REILEY TIMOTHY CLARK , TSOU UH-PO ERIC , VILKELIS WALTER VALERIAN
IPC: H01L21/60 , H01L23/495 , H01L23/498 , H01L23/64
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公开(公告)号:DE69226398D1
公开(公告)日:1998-09-03
申请号:DE69226398
申请日:1992-04-29
Applicant: IBM
Inventor: GOW JOHN , NOTH RICHARD WILLIAM
IPC: H01L21/60 , H01L23/495
Abstract: An improved package for semiconductor chips, and method of forming the package are provided. The package includes a lead frame (12) having a central chip (10) bonding portion and first (16) and second (18) sets of interdigitaled fingers. The inner ends of the first set of fingers terminate at a distance from the central chip bonding portion closer than the inner ends of the fingers of the second set at fingers. A semiconductor chip, having input/output pads is bonded to the central chip bonding portion (13). A first set of wires (20) directly couples respective input/output pads on the chip to the first set of fingers. A second set of wires (22) couples respective input/output pads on the chip with the second set of fingers. Each of the wires of the second set of wires has a first segment extending from its respective input/output pad to an intermediate bonding region, and a second segment extending from the intermediate bonding region to its respective finger of the second set of fingers.
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公开(公告)号:DE69226398T2
公开(公告)日:1999-03-25
申请号:DE69226398
申请日:1992-04-29
Applicant: IBM
Inventor: GOW JOHN , NOTH RICHARD WILLIAM
IPC: H01L21/60 , H01L23/495
Abstract: An improved package for semiconductor chips, and method of forming the package are provided. The package includes a lead frame (12) having a central chip (10) bonding portion and first (16) and second (18) sets of interdigitaled fingers. The inner ends of the first set of fingers terminate at a distance from the central chip bonding portion closer than the inner ends of the fingers of the second set at fingers. A semiconductor chip, having input/output pads is bonded to the central chip bonding portion (13). A first set of wires (20) directly couples respective input/output pads on the chip to the first set of fingers. A second set of wires (22) couples respective input/output pads on the chip with the second set of fingers. Each of the wires of the second set of wires has a first segment extending from its respective input/output pad to an intermediate bonding region, and a second segment extending from the intermediate bonding region to its respective finger of the second set of fingers.
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公开(公告)号:DE68920944D1
公开(公告)日:1995-03-16
申请号:DE68920944
申请日:1989-08-24
Applicant: IBM
Inventor: BICKFORD HARRY RANDALL , BREGMAN MARK FIELDING , CIPOLLA THOMAS MARIO , GOW JOHN , LEDERMANN PETER GERARD , MIERSCH EKKEHARD FRITZ , OLSON LEONARD THEODORE , PAGNINI DAVID PETER , REILEY TIMOTHY CLARK , TSOU UH-PO ERIC , VILKELIS WALTER VALERIAN
IPC: H01L21/60 , H01L23/495 , H01L23/498 , H01L23/64
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公开(公告)号:DE1194061B
公开(公告)日:1965-06-03
申请号:DEJ0019829
申请日:1961-04-27
Applicant: IBM
Inventor: BARSON FRED , GOW JOHN
Abstract: 917,646. Semi-conductor devices. INTERNATIONAL BUSINESS MACHINES CORPORATION. April 5, 1961 [April 28, 1959], No. 12111/61. Class 37. In a method of making a PNPN device of the general kind described and claimed in Specification 917,645, in which the PNP section has a low α while the NPN section has a comparatively high α, a semi-conductor body of one conductivity type is contacted by a first pellet containing an impurity characteristic of the opposite conductivity type and heated to a first temperature above the melting-point of the pellet but below that of the body, to cause the pellet to melt and dissolve the adjacent region of the body and to cause impurity atoms to diffuse beyond said region, so that, when cooled, the body comprises contiguous diffused and recrystallized zones of the said opposite conductivity type; then a second pellet containing an impurity characteristic of said one conductivity type is placed in contact with the first pellet and the assembly is heated to a second temperature above the melting-points of the pellets but below the first temperature, so that the conductivity type of a portion of the said recrystallized region is changed. As shown, Fig. 2, a pellet 25 comprising 90% Pb, 10% Sb, and a ring 22 comprising 98% Pb, 2% In, are placed in contact with one surface of a wafer 16 of P-type Ge ; a pellet 24 comprising 98.25% Pb, 1.75% Sb, is placed in contact with the opposite surface of the wafer 16 ; and the assembly is heated in an inert or reducing atmosphere to 750-800‹ C. for about 1 hour. The pellets and ring melt and dissolve adjacent regions of the wafer; moreover, Sb atoms from the pellets diffuse into the body of the wafer so that, on cooling, N-type regions 11, 17 are formed, the former being made up of a recrystallized region 12 adjacent a diffused region 13, and the latter being made up of a recrystallized region 19 adjacent a diffused region 18. A further pellet, not shown, comprising lead with a small quantity of Ga is placed on pellet 24 and the assembly is heated to about 50 ‹ C. lower than the previous alloying temperature, e.g. 700‹ C., for 10 minutes, during which time the further pellet and pellet 24 melt and dissolve part of recrystallized region 12. Upon cooling, a P-type region 15, Fig. 1, appears between region 12 and the pellet 24. Subsequently, a comparatively massive heatdissipating conductor 21 is bonded to pellet 24 and lead-wires 40, 23 to ohmic ring 22 and pellet 25, respectively. The device is then electrolytically etched in an alkali bath to reduce the size of the pellets, expose the peripheries of PN junctions 27, 28, 30, and create annular recesses 26, 41. The low α desired for the PNP section 15, 11, 16 is attained by controlling the width of the recrystallized N-type region 12, thus permitting a higher γ for P-type region 15 and reducing the impedance of the junction 30. In Fig. 4, the PNPN device 10 is used as a switching means for controlling the flow of current through a relay winding 33, P-type region 16 serving as the controllable base zone. Junction 27 is reverse biased by a small voltage from battery 31; a small positive-going pulse from generator 34 renders the device conductive. The device may alternatively comprise Si, Si-Ge alloy, or a semi-conductor intermetallic compound, and an additional electrode may be added to N-type region 11.
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