公开(公告)号：EP1649493A4

公开(公告)日：2010-04-14

申请号：EP04777801

申请日：2004-07-08

Applicant: IBM

Inventor： BEDNAR THOMAS R ,  GOULD SCOTT W ,  LACKEY DAVID E ,  STOUT DOUGLAS W ,  ZUCHOWSKI PAUL S

IPC: G06F17/50 ,  G06F1/26 ,  G06F9/45 ,  G11C5/14 ,  H01L20060101 ,  H01L23/528 ,  H01L27/02 ,  H02J3/38

CPC classification number: H01L23/5286 ,  G11C5/14 ,  H01L27/0203 ,  H01L2924/0002 ,  H01L2924/00

公开(公告)号：WO2005008725A3

公开(公告)日：2006-11-23

申请号：PCT/US2004021943

申请日：2004-07-08

Applicant: IBM ,  BEDNAR THOMAS R ,  GOULD SCOTT W ,  LACKEY DAVID E ,  STOUT DOUGLAS W ,  ZUCHOWSKI PAUL S

Inventor： BEDNAR THOMAS R ,  GOULD SCOTT W ,  LACKEY DAVID E ,  STOUT DOUGLAS W ,  ZUCHOWSKI PAUL S

IPC: G06F17/50 ,  G06F9/45 ,  H01L20060101 ,  H01L23/528 ,  H01L27/02

CPC classification number: H01L23/5286 ,  G11C5/14 ,  H01L27/0203 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit comprising: a parent terrain (element 12); and a hierarchal order of nested voltage islands within the parent terrain (element 12), each higher-order voltage island nested (Figure 5, element 32) within a lower-order voltage island (Figure 5), each nested voltage island (Figure 5, element 32) having the same hierarchal structure.

Abstract translation: 一种集成电路，包括：母地形（元件12）; 以及在主地形（元件12）内的嵌套电压岛的层级顺序，在低阶电压岛（图5）内的每个高阶电压岛嵌套（图5，元件32），每个嵌套电压岛（图5 ，元件32）具有相同的层级结构。

公开(公告)号：JP2002261599A

公开(公告)日：2002-09-13

申请号：JP2001368652

申请日：2001-12-03

Applicant: IBM

Inventor： ANAND DARREN L ,  JOHN EDWARD BASS JR ,  FIFIELD JOHN ATKINSON ,  GILLIS PAMELA SUE ,  JAKOBSEN PETER O ,  KEMERER DOUGLAS WAYNE ,  LACKEY DAVID E ,  OAKLAND STEVEN FREDERICK ,  OUELLETTE MICHAEL RICHARD ,  TONTI WILLIAM R

IPC: H01L21/82 ,  G11C7/00 ,  G11C29/00 ,  G11C29/04 ,  H03K19/173

Abstract: PROBLEM TO BE SOLVED: To provide a method and a device for a fuse programming integrated circuit in which fuses are used in common by redundant elements. SOLUTION: A method and a device for initializing an integrated circuit by the use of the compressed data from a remote fuse box are capable of reducing fuses in number required for repairing or customizing the integrated circuit, and grouping the fuses outside macros which are repaired by the fuses. The remote position of the fuses improves the arrangement of the macros, having redundant repairing performances in flexibility and enables the fuses to be properly grouped for facilitating the usability of programming and the layout of circuits. The fuses are formed into columns and rows, to represent control words and run-length compressed data and to provide more repairing points per fuse. The data are loaded into a shift register in series and shifted to macro positions, for controlling the selection of redundant circuits, so that defective integrated circuits can be repaired, and the logic is customized.

公开(公告)号：JP2002215706A

公开(公告)日：2002-08-02

申请号：JP2001338435

申请日：2001-11-02

Applicant: IBM

Inventor： COHN JOHN M ,  DEAN ALVAR A ,  HATHAWAY DAVID J ,  LACKEY DAVID E ,  LEPSIC THOMAS M ,  LICHTENSTEIGER SUSAN K ,  TETREAULT SCOTT A ,  VENTRONE SEBASTIAN T

IPC: G06F17/50 ,  H01L21/82

Abstract: PROBLEM TO BE SOLVED: To provide a logical and physical constitution for a voltage island. SOLUTION: In design of a semiconductor chip, it is parted by the unit of bin, which means plural ranges in the design. Design of one semiconductor chip can thus be sliced to various ranges, and these ranges can be allotted to various voltage levels. Each bin can be regarded as one voltage island. Circuits in the design can be added to various bins, or eliminated from the various bins. Circuit speed and power can be increased or reduced by this. When the circuit is disposed in the bin to which a high voltage is allotted, speed and power are increased. When the circuit is disposed in the bin having a low voltage, speed and power are reduced. The size and position of the bin can also be changed. By repeating these steps, the optimum power consumption can be achieved while satisfying other standards such as constraint related to speed.