公开(公告)号：CA2120557A1

公开(公告)日：1994-12-12

申请号：CA2120557

申请日：1994-04-05

Applicant: IBM

Inventor： ANSCHEL MORRIS ,  INGRAHAM ANTHONY P ,  LAMB CHARLES R ,  LOWELL MICHAEL D ,  MARKOVICH VOYA R ,  MAYR WOLFGANG ,  MURPHY RICHARD G ,  PIERSON MARK V ,  POWERS TAMAR A ,  RENY TIMOTHY S ,  REYNOLDS SCOTT D ,  SAMMAKIA BAHGAT G ,  STORR WAYNE R

IPC: G01R31/26 ,  G01R31/28 ,  H01L21/66 ,  H01R13/02

Abstract: METHOD AND APPARATUS FOR TESTING OF INTEGRATED CIRCUIT CHIPS A method of testing semi-conductor chips is disclosed. The individual semiconductor chips have I/O, power, and ground contacts. In the method of the invention a chip test fixture system is provided. The chip test fixture system has contacts corresponding to the contacts on the semiconductor chip. The carrier contacts have dendritic surfaces. The chip contacts are brought into electrically conductive contact with the conductor pads on the chip test fixture system. Test signal input vectors are applied to the inputs of the semiconductor chip, and output signal vectors are recovered from the semiconductor chip. After testing the chip is removed from the substrate.

公开(公告)号：CA2110472A1

公开(公告)日：1994-09-02

申请号：CA2110472

申请日：1993-12-01

Applicant: IBM

Inventor： BHATT ANILKUMAR C ,  BUDA LEO R ,  EDWARDS ROBERT D ,  HART PAUL J ,  INGRAHAM ANTHONY P ,  MARKOVICH VOYA R ,  MOLLA JAYNAL A ,  MURPHY RICHARD G ,  SAXENMEYER GEORGE J JR ,  WALKER GEORGE F ,  WHALEN BETTE J ,  ZARR RICHARD S

IPC: G01R31/28 ,  H01L21/60 ,  H01L21/66 ,  G01R31/26

Abstract: A method of testing semiconductor chips is disclosed. The individual semiconductor chips have I/O, power, and ground contacts. In the method of the invention a chip carrier is provided. The chip carrier has contacts corresponding to the contacts on the semiconductor chip. The carrier contacts have dendritic surfaces. The chip contacts are brought into conductive contact with the conductor pads on the chip carrier. Test signal input vectors are applied to the inputs of the semiconductor chip, and output signal vectors are recovered from the semiconductor chip. After testing, the chip may be removed from the substrate. Alternatively, the chip may be bonded through the dendritic conductor pads to the substrate after successful testing.

公开(公告)号：CA2045227A1

公开(公告)日：1992-03-10

申请号：CA2045227

申请日：1991-06-21

Applicant: IBM

Inventor： ANSCHEL MORRIS ,  BARBOSA JOSE A ,  DIBBLE ERIC P ,  FUNARI JOSEPH ,  KRESGE JOHN S ,  LAMB CHARLES R ,  MURPHY RICHARD G ,  REYNOLDS SCOTT D ,  SAMMAKIA BAHGAT G ,  SHOLTES TAMAR A ,  STORR WAYNE R JR

IPC: H01L23/36 ,  H01L23/538 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18 ,  H05K1/18

Abstract: HIGH MEMORY DENSITY PACKAGE Disclosed is a high density microelectronic circuit package. The circuit package includes a plurality of IC chips, as memory chips, on a circuitized flexible tape, which is, in turn, bonded to a printed circuit board. The circuitized flexible tape extends outwardly from the printed circuit board and has a plurality of IC chips mounted on I/O pads on the tape. The individual IC chips are in thermal contact with a heat sink means on the surfaces thereof opposite the circuitized flexible tape. The circuitized flexible tape and the heat sink are bonded to a printed circuit board.