公开(公告)号：AT504946T

公开(公告)日：2011-04-15

申请号：AT05707994

申请日：2005-02-10

Applicant: IBM

Inventor： FURUKAWA TOSHIHARU ,  HAKEY MARK ,  HOLMES STEVEN ,  HORAK DAVID ,  KOBURGER CHARLES ,  MITCHELL PETER ,  NESBIT LARRY

IPC: H01L51/05 ,  G11C13/02 ,  H01L21/335 ,  H01L21/336 ,  H01L27/28 ,  H01L29/06 ,  H01L29/12 ,  H01L29/772 ,  H01L51/30 ,  H01L51/40

Abstract: Carbon nanotube field effect transistors, arrays of carbon nanotube field effect transistors, device structures, and arrays of device structures. A stacked device structure includes a gate electrode layer and catalyst pads each coupled electrically with a source/drain contact. The gate electrode layer is divided into multiple gate electrodes and at least one semiconducting carbon nanotube is synthesized by a chemical vapor deposition process on each of the catalyst pads. The gate electrode has a sidewall covered by a gate dielectric and at least one semiconducting carbon nanotube adjacent to the sidewall of the gate electrode. Source/drain contacts are electrically coupled with opposite ends of the semiconducting carbon nanotube to complete the device structure. Multiple device structures may be configured either as a memory circuit or as a logic circuit.

公开(公告)号：DE602005005302T2

公开(公告)日：2009-03-12

申请号：DE602005005302

申请日：2005-01-13

Applicant: IBM

Inventor： FURUKAWA TOSHIHARU ,  HAKEY MARK CHARLES ,  HOLMES STEVEN JOHN ,  HORAK DAVID VACLAV ,  MITCHELL PETER ,  NESBIT LARRY ALAN

IPC: H01L51/30 ,  H01L21/78 ,  H01L27/28

Abstract: Vertical field effect transistors having a channel region defined by at least one semiconducting nanotube and methods for fabricating such vertical field effect transistors by chemical vapor deposition using a spacer-defined channel. Each nanotube is grown by chemical vapor deposition catalyzed by a catalyst pad positioned at the base of a high-aspect-ratio passage defined between a spacer and a gate electrode. Each nanotube grows in the passage with a vertical orientation constrained by the confining presence of the spacer. A gap may be provided in the base of the spacer remote from the mouth of the passage. Reactants flowing through the gap to the catalyst pad participate in nanotube growth.

公开(公告)号：DE602005005302D1

公开(公告)日：2008-04-24

申请号：DE602005005302

申请日：2005-01-13

Applicant: IBM

Inventor： FURUKAWA TOSHIHARU ,  HAKEY MARK CHARLES ,  HOLMES STEVEN JOHN ,  HORAK DAVID VACLAV ,  MITCHELL PETER ,  NESBIT LARRY ALAN

IPC: H01L51/30 ,  H01L21/78 ,  H01L27/28

Abstract: Vertical field effect transistors having a channel region defined by at least one semiconducting nanotube and methods for fabricating such vertical field effect transistors by chemical vapor deposition using a spacer-defined channel. Each nanotube is grown by chemical vapor deposition catalyzed by a catalyst pad positioned at the base of a high-aspect-ratio passage defined between a spacer and a gate electrode. Each nanotube grows in the passage with a vertical orientation constrained by the confining presence of the spacer. A gap may be provided in the base of the spacer remote from the mouth of the passage. Reactants flowing through the gap to the catalyst pad participate in nanotube growth.

公开(公告)号：DE602005027316D1

公开(公告)日：2011-05-19

申请号：DE602005027316

申请日：2005-02-10

Applicant: IBM

Inventor： FURUKAWA TOSHIHARU ,  HAKEY MARK CHARLES ,  HOLMES STEVEN JOHN ,  HORAK DAVID VACLAV ,  KOBURGER CHARLES WILLIAM ,  MITCHELL PETER ,  NESBIT LARRY ALAN

IPC: H01L51/05 ,  G11C13/02 ,  H01L21/335 ,  H01L21/336 ,  H01L27/28 ,  H01L29/06 ,  H01L29/12 ,  H01L29/772 ,  H01L51/30 ,  H01L51/40

公开(公告)号：DE602005027329D1

公开(公告)日：2011-05-19

申请号：DE602005027329

申请日：2005-02-23

Applicant: IBM

Inventor： FURUKAWA TOSHIHARU ,  HAKEY MARK CHARLES ,  HORAK DAVID VACLAV ,  KOBURGER CHARLES WILLIAM III ,  MASTERS MARK ELIOT ,  MITCHELL PETER ,  POLONSKY STANISLAV

IPC: H01L21/768 ,  H01L21/285 ,  H01L23/522

公开(公告)号：AT504942T

公开(公告)日：2011-04-15

申请号：AT05737717

申请日：2005-02-23

Applicant: IBM

Inventor： FURUKAWA TOSHIHARU ,  HAKEY MARK ,  HORAK DAVID ,  KOBURGER III CHARLES ,  MASTERS MARK ,  MITCHELL PETER ,  POLONSKY STANISLAV

IPC: H01L21/768 ,  H01L21/285 ,  H01L23/522

Abstract: Conductive paths in an integrated circuit are formed using multiple undifferentiated carbon nanotubes embedded in a conductive metal, which is preferably copper. Preferably, conductive paths include vias running between conductive layers. Preferably, composite vias are formed by forming a metal catalyst pad on a conductor at the via site, depositing and etching a dielectric layer to form a cavity, growing substantially parallel carbon nanotubes on the catalyst in the cavity, and filling the remaining voids in the cavity with copper. The next conductive layer is then formed over the via hole.

公开(公告)号：AT389242T

公开(公告)日：2008-03-15

申请号：AT05701511

申请日：2005-01-13

Applicant: IBM

Inventor： FURUKAWA TOSHIHARU ,  HAKEY MARK ,  HOLMES STEVEN ,  HORAK DAVID ,  MITCHELL PETER ,  NESBIT LARRY

IPC: H01L51/30 ,  H01L21/78 ,  H01L27/28

Abstract: Vertical field effect transistors having a channel region defined by at least one semiconducting nanotube and methods for fabricating such vertical field effect transistors by chemical vapor deposition using a spacer-defined channel. Each nanotube is grown by chemical vapor deposition catalyzed by a catalyst pad positioned at the base of a high-aspect-ratio passage defined between a spacer and a gate electrode. Each nanotube grows in the passage with a vertical orientation constrained by the confining presence of the spacer. A gap may be provided in the base of the spacer remote from the mouth of the passage. Reactants flowing through the gap to the catalyst pad participate in nanotube growth.