公开(公告)号：DE3062705D1

公开(公告)日：1983-05-19

申请号：DE3062705

申请日：1980-05-13

Applicant: IBM

Inventor： BARILE CONRAD ALBERT ,  GOTH GEORGE RICHARD ,  MAKRIS JAMES STEVE ,  NAGARAJAN ARUNACHALA ,  RAHEJA RAJ KANWAL

IPC: H01L29/73 ,  H01L21/033 ,  H01L21/265 ,  H01L21/331 ,  H01L21/76 ,  H01L21/8222 ,  H01L27/06 ,  H01L27/07 ,  H01L29/417 ,  H01L21/00

Abstract: A very high current ion implanted emitter is formed in a diffused base. Windows are made through the silicon nitride and silicon dioxide layes to both the base contact and the emitter regions using a resist mask. These regions are then protected by resist and the collector contact window is opened through the remainder of the silicon dioxide layer to the reach through region. A screen oxide is then grown in all the exposed areas after the removal of the resist mask. A resist mask is applied which covers only the base and Schottky anode regions. Arsenic is then implanted through the exposed screened areas followed by an etch back step to remove the top damaged layer. With some remaining screen oxide serving as a cap, the emitter drive-in is done.

公开(公告)号：DE3175352D1

公开(公告)日：1986-10-23

申请号：DE3175352

申请日：1981-10-29

Applicant: IBM

Inventor： BARBEE STEVEN GEORGE ,  LEAS JAMES MARC ,  LLOYD JAMES ROBERT ,  NAGARAJAN ARUNACHALA

IPC: H01L29/73 ,  H01L21/02 ,  H01L21/20 ,  H01L21/28 ,  H01L21/3205 ,  H01L21/331 ,  H01L21/74 ,  H01L21/76 ,  H01L21/768 ,  H01L21/822 ,  H01L23/52 ,  H01L27/00 ,  H01L27/12 ,  H01L29/04 ,  H01L21/268

Abstract: The semiconductor device, such as a bipolar transistor, is formed in superposed layers doped with various types and concentrations of doping impurities. Said layers forming a thin monocrystalline semiconductor film (11) are supported on the surface of a substrate and contacted electrically with a conductive network on top of thin film (11). Two or several of such devices can be stacked one upon the other and interconnected electrically. Thin film (11) is produced preferably from a non-monocrystalline semiconductor film having the defined dopant distribution and a tapered region (14) terminating in a point (15). Starting at point (15) the thin film (11) is traversed with a particle beam causing the growth of a monocrystalline thin film (11). The device and method are useful in the VLSI-technology.

公开(公告)号：IT1149957B

公开(公告)日：1986-12-10

申请号：IT2199580

申请日：1980-05-13

Applicant: IBM

Inventor： BARILE CONRAD ALBERT ,  GOTH GEORGE RICHARD ,  MAKRIS JAMES STEVE ,  NAGARAJAN ARUNACHALA ,  RAHEJA RAJ KANWAL

IPC: H01L29/73 ,  H01L21/033 ,  H01L21/265 ,  H01L21/331 ,  H01L21/76 ,  H01L21/8222 ,  H01L27/06 ,  H01L27/07 ,  H01L29/417

Abstract: A very high current ion implanted emitter is formed in a diffused base. Windows are made through the silicon nitride and silicon dioxide layes to both the base contact and the emitter regions using a resist mask. These regions are then protected by resist and the collector contact window is opened through the remainder of the silicon dioxide layer to the reach through region. A screen oxide is then grown in all the exposed areas after the removal of the resist mask. A resist mask is applied which covers only the base and Schottky anode regions. Arsenic is then implanted through the exposed screened areas followed by an etch back step to remove the top damaged layer. With some remaining screen oxide serving as a cap, the emitter drive-in is done.

公开(公告)号：DE3265730D1

公开(公告)日：1985-10-03

申请号：DE3265730

申请日：1982-03-23

Applicant: IBM

Inventor： NAGARAJAN ARUNACHALA ,  SARKARY HOMI GUSTADJI

IPC: H01L27/06 ,  H01L21/033 ,  H01L21/28 ,  H01L21/285 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/8222 ,  H01L29/47 ,  H01L29/861 ,  H01L29/872 ,  H01L21/263

Abstract: With the method a protective layer (18) that is overlying an insulated oxide layer (16) bordering on a semiconductor substrate is etched selectively by a beam of ions in an inert atmosphere. Using this method pinholes in exposed areas of the oxide layer (16) are not attacked and consequently not extended so that the semiconductor areas underneath these exposed areas are not doped with conductivity determining impurities in a subsequent diffusion step. Therefore the formation of resistive shorts is avoided. … The method is preferably used for fabricating Schottky barrier diodes in conjunction with other devices, such as transistors, so as to form integrated arrays.

公开(公告)号：CA1139015A

公开(公告)日：1983-01-04

申请号：CA349764

申请日：1980-04-14

Applicant: IBM

Inventor： BARILE CONRAD A ,  GOTH GEORGE R ,  MAKRIS JAMES S ,  NAGARAJAN ARUNACHALA ,  RAHEJA RAJ K

IPC: H01L29/73 ,  H01L21/033 ,  H01L21/265 ,  H01L21/331 ,  H01L21/76 ,  H01L21/8222 ,  H01L27/06 ,  H01L27/07 ,  H01L29/417 ,  H01L21/22

Abstract: BIPOLAR TRANSISTOR FABRICATION PROCESS WITH AN ION IMPLANTED EMITTER A very high current ion implanted emitter is formed in a diffused base. Windows are made through the silicon nitride and silicon dioxide layers to both the base contact and the emitter regions using a resist mask. These regions are than protected by resist and the collector contact window is opened through the remainder of the silicon dioxide layer to the reach through region. A screen oxide is grown in all the exposed areas after removal of the resist mask. A resist mask is applied which covers only the base and Schottky anode regions. Arsenic is then implanted through the exposed screened areas followed by an etch back step to remove the top damaged layer. With some remaining screen oxide serving as a cap, the emitter drive-in is done. FI 9-78-055

公开(公告)号：CA996279A

公开(公告)日：1976-08-31

申请号：CA182968

申请日：1973-10-09

Applicant: IBM

Inventor： BARILE CONRAD A ,  DOCKERTY ROBERT C ,  NAGARAJAN ARUNACHALA

IPC: H01L29/78 ,  H01L21/28 ,  H01L21/283 ,  H01L21/314 ,  H01L21/316 ,  H01L21/336 ,  H01L29/00 ,  H01L29/51

Abstract: Large threshold voltage shifts of silicon gate FET devices having a composite nitride-oxide gate dielectric are greatly reduced by subjecting the nitride to a dry oxygen annealing at temperatures between 970 DEG -1,150 DEG C prior to depositing the silicon gate electrode. Annealing at 1,050 DEG C applied for a duration of one-half to one hour produces excellent results.

公开(公告)号：DE2355605A1

公开(公告)日：1974-06-12

申请号：DE2355605

申请日：1973-11-07

Applicant: IBM

Inventor： BARILE CONRAD ALBERT ,  DOCKERTY ROBERT CHARLES ,  NAGARAJAN ARUNACHALA

IPC: H01L29/78 ,  H01L21/28 ,  H01L21/283 ,  H01L21/314 ,  H01L21/316 ,  H01L21/336 ,  H01L29/00 ,  H01L29/51 ,  H01L7/34 ,  H01L1/10

Abstract: Large threshold voltage shifts of silicon gate FET devices having a composite nitride-oxide gate dielectric are greatly reduced by subjecting the nitride to a dry oxygen annealing at temperatures between 970 DEG -1,150 DEG C prior to depositing the silicon gate electrode. Annealing at 1,050 DEG C applied for a duration of one-half to one hour produces excellent results.