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    High-mobility hetero-junction complementary field-effect transistor and its method
    2.
    发明专利
    High-mobility hetero-junction complementary field-effect transistor and its method 有权
    高移动性异方体补偿场效应晶体及其方法

    公开(公告)号：JP2005217391A

    公开(公告)日：2005-08-11

    申请号：JP2004312192

    申请日：2004-10-27

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

    Inventor： OUYANG QIQING C ,  CHEN XIANGDONG

    IPC: H01L27/08 ,  H01L21/20 ,  H01L21/336 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/10 ,  H01L29/78 ,  H01L29/786

    CPC classification number: H01L29/66636 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/1054 ,  H01L29/7841

    Abstract: PROBLEM TO BE SOLVED: To provide the structure and manufacturing method of a high-performance electric field effect device.
    SOLUTION: This MOS structure is equipped with a sort of conductive crystal Si main part, SiGe layer for which epitaxial growth has been performed on the Si main part that works as a buried channel of a hole, Si layer for which epitaxial growth has been performed on the SiGe layer that works as an electronic surface channel, and source/drain which accomodates strained SiGe for which conductive epitaxial growth has been performed in a way different from the Si main part. This SiGe source/drain forms hetero-junction and metallic bonding with the Si main part by overlapping each other with a tolerance of less than about 10 nm, preferably 5 nm. This heterostructure source/drain is useful for reducing a short channel effect. The foregoing structure increases hole mobility in a compressively strained SiGe channel, and therefore it is advantageous to PMOS. In typical embodiments, CMOS structure is provided on bulk and SOI.
    COPYRIGHT: (C)2005,JPO&NCIPI

    Abstract translation: 要解决的问题：提供高性能电场效应器件的结构和制造方法。 解决方案：该MOS结构配备有一种导电晶体Si主要部分，对作为空穴的掩埋沟道的Si主要部分进行外延生长的SiGe层，外延生长的Si层 已经在用作电子表面通道的SiGe层上进行了，以及源/漏，其适应已经以不同于Si主要部分的方式进行导电外延生长的应变SiGe。 该SiGe源极/漏极通过以小于约10nm，优选5nm的公差彼此重叠而与Si主要部分形成异质结和金属结合。 该异质结构源极/漏极可用于减少短沟道效应。 上述结构增加了压缩应变SiGe沟道中的空穴迁移率，因此对PMOS是有利的。 在典型的实施例中，在本体和SOI上提供了CMOS结构。 版权所有（C）2005，JPO＆NCIPI

    ULTRA HIGH-SPEED SI/SIGE MODULATION-DOPED FIELD EFFECT TRANSISTORS ON ULTRA THIN SOI/SGOI SUBSTRATE
    4.
    发明申请
    ULTRA HIGH-SPEED SI/SIGE MODULATION-DOPED FIELD EFFECT TRANSISTORS ON ULTRA THIN SOI/SGOI SUBSTRATE 审中-公开
    超高速SI / SIGE调制掺杂场效应晶体管在超薄SOI / SGOI衬底上的应用

    公开(公告)号：WO2005036613A3

    公开(公告)日：2005-07-07

    申请号：PCT/US2004028045

    申请日：2004-08-27

    Applicant: IBM ,  CHU JACK O ,  OUYANG QIQING C

    Inventor： CHU JACK O ,  OUYANG QIQING C

    IPC: H01L21/335 ,  H01L29/10 ,  H01L29/778 ,  H01L29/786

    CPC classification number: H01L29/1054 ,  H01L29/78687

    Abstract: A silicon and silicon germanium based semiconductor MODFET device design and method of manufacture. The MODFET design includes a high-mobility layer structure capable of ultra high-speed, low-noise for a variety of communication applications including RF, microwave, sub-millimeter-wave and millimeter-wave. The epitaxial field effect transistor layer structure includes critical (vertical and lateral) device scaling and layer structure design for a high mobility strained n-channel and p-channel transistor incorporating silicon and silicon germanium layers to form the optimum modulation-doped heterostructure on an ultra thin SOI or SGOI substrate capable of achieving greatly improved RF performance.

    Abstract translation: 基于硅和硅锗的半导体MODFET器件设计和制造方法。 MODFET设计包括高迁移率层结构，能够为包括RF，微波，亚毫米波和毫米波在内的各种通信应用提供超高速，低噪声。 外延场效应晶体管层结构包括用于高迁移率应变n沟道和p沟道晶体管的临界（垂直和横向）器件缩放和层结构设计，所述高迁移率应变n沟道和p沟道晶体管结合硅和硅锗层以在超薄膜上形成最优调制掺杂异质结构 薄SOI或SGOI衬底能够实现极大改进的射频性能。

    Structure of high-mobility field-effect transistor and method of manufacturing the same
    5.
    发明专利
    Structure of high-mobility field-effect transistor and method of manufacturing the same 有权
    高移动场效应晶体管的结构及其制造方法

    公开(公告)号：JP2005123580A

    公开(公告)日：2005-05-12

    申请号：JP2004234182

    申请日：2004-08-11

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

    Inventor： CHU JACK O ,  KOESTER STEVEN J ,  OUYANG QIQING C

    IPC: H01L29/06 ,  H01L21/20 ,  H01L21/335 ,  H01L21/338 ,  H01L29/778 ,  H01L29/78 ,  H01L29/786 ,  H01L29/812

    CPC classification number: H01L29/66431 ,  H01L29/7782 ,  Y10S438/933 ,  Y10S438/938

    Abstract: PROBLEM TO BE SOLVED: To provide a high-mobility semiconductor layer and a structure of a MODFET (modulation-doped field-effect transistor) which include a high-mobility conduction channel and simultaneously maintain a counter dope to reduce a harmful short channel effect. SOLUTION: A high-performance n-MODFET transistor device is formed by providing an insulating gate dielectric on an Si cap layer, a gate electrode disposed on the insulating gate dielectric, and n-type source and drain contact areas which are disposed in contact with one side of the gate electrode and stretch from a surface of a multilayer structure into a p-type doped portion of a relaxed Si 1-X Ge X layer. This MODFET design includes the high-mobility conduction channel. This method forms a counter doped portion by using a standard technique such as ion implantation and bringing a high-mobility channel close to the counter doped portion without reducing a mobility. COPYRIGHT: (C)2005,JPO&NCIPI

    Abstract translation: 要解决的问题：为了提供包括高迁移率传导通道的MODFET（调制掺杂场效应晶体管）的高迁移率半导体层和结构，并且同时保持反向掺杂以减少有害短路 渠道效应。 解决方案：通过在Si覆盖层上提供绝缘栅极电介质，设置在绝缘栅极电介质上的栅极电极和设置在绝缘栅极电介质上的n型源极和漏极接触区域来形成高性能n-MODFET晶体管器件 与栅电极的一侧接触并且从多层结构的表面拉伸成松弛的Si 1-X SB Ge x SB层的p型掺杂部分。 该MODFET设计包括高迁移率传导通道。 该方法通过使用诸如离子注入的标准技术形成反掺杂部分，并使高迁移率通道靠近反掺杂部分而不降低迁移率。 版权所有（C）2005，JPO＆NCIPI

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