公开(公告)号：US3569607A

公开(公告)日：1971-03-09

申请号：US3569607D

申请日：1969-08-01

Applicant: IBM

Inventor： MARTYAK JOHN E ,  REEBER MORTON D ,  WURMS CHARLES

IPC: H01R4/02 ,  B23K1/00 ,  H01R4/00 ,  H01R12/57 ,  H05K1/03 ,  H05K1/18 ,  H05K3/34 ,  H05K3/40 ,  H05K3/32

CPC classification number: H01R12/57 ,  H05K1/0306 ,  H05K3/3421 ,  H05K3/4015 ,  H05K2201/09481 ,  H05K2201/1031 ,  H05K2201/10704 ,  H05K2201/2081 ,  Y02P70/611 ,  Y02P70/613

Abstract: This patent discloses a resolderable connector particularly adapted for interconnecting multilayer modules with circuit boards and the like, but not limited thereto, the multilayer modules including a monolithic ceramic body with interconnected electrical conductors bonded to the ceramic. The modules include conductive terminations on at least one of the external surfaces of the ceramic body. Connected to these external conductive terminations are cuplike receptacles having a good solder wettable interior and a poor solder wettable exterior, the cuplike receptacles being connected to the conductive terminations as by brazing, but at any rate by a means having a higher melting temperature than conventional lead-tin solder so that bringing the receptacles to a temperature to heat the solder so that they may receive pins from projecting circuit boards does not cause release of the receptacles from the ceramic body.

公开(公告)号：US3239787A

公开(公告)日：1966-03-08

申请号：US19257062

申请日：1962-05-04

Applicant: IBM

Inventor： REEBER MORTON D

IPC: C22C28/00 ,  G11C11/44 ,  H01L39/12 ,  H03K19/195

CPC classification number: G11C11/44 ,  C22C28/00 ,  H01L39/12 ,  H03K19/1952 ,  Y10S505/881

公开(公告)号：US3436104A

公开(公告)日：1969-04-01

申请号：US3436104D

申请日：1967-09-25

Applicant: IBM

Inventor： JACKSON JAMES S ,  REEBER MORTON D

IPC: F16L33/16 ,  F16L17/00

CPC classification number: F16L33/16

公开(公告)号：CA1139008A

公开(公告)日：1983-01-04

申请号：CA349744

申请日：1980-04-14

Applicant: IBM

Inventor： CARPENTER CHARLES ,  FUGARDI JOSEPH F ,  GREGOR LAWRENCE V ,  GROSEWALD PETER S ,  REEBER MORTON D

IPC: B23K35/00 ,  H01L21/60 ,  H01L23/532 ,  H05K1/11

Abstract: METHOD OF FORMING AN IMPROVED SOLDER INTERCONNECTION BETWEEN A SEMICONDUCTOR DEVICE AND A SUPPORTING SUBSTRATE A ball limiting metallurgy pad structure for a semiconductor device solder bond interconnection comprises a conductive layer that is adherent to the semiconductor device passivating layer, a relatively thick layer of a material that has a high thermal conductivity, a barrier layer that protects the high conductivity layer by physically preventing it from interacting or alloying with any subsequent layers, and a layer of a material that is solder wettable.

公开(公告)号：FR2356447A1

公开(公告)日：1978-01-27

申请号：FR7714016

申请日：1977-05-03

Applicant: IBM

Inventor： DOUGHERTY WILLIAM E JR ,  GREGOR LAWRENCE V ,  KLEIN DONALD L ,  REDMOND THOMAS F ,  REEBER MORTON D

IPC: F25D9/00 ,  G12B15/02 ,  H01L23/427 ,  H05K7/20 ,  H01L23/44 ,  B01D43/00

Abstract: A device for removing contaminant impurities, particularly contaminants existing at very low levels, from a liquid, including a heating element at least partially immersible in the liquid, a confinement means at least partially immersible in the liquid for maintaining a pulsating bubble of vapor of the liquid, the heating element located within the confining means, openings in the confining means to allow periodic partial escape of the vapor bubble and ingress of liquid.

公开(公告)号：CA709574A

公开(公告)日：1965-05-18

申请号：CA709574D

Applicant: IBM

Inventor： REEBER MORTON D ,  JONES ROBERT E JR

公开(公告)号：DE3072031D1

公开(公告)日：1987-10-22

申请号：DE3072031

申请日：1980-06-03

Applicant: IBM

Inventor： CARPENTER CHARLES ,  FUGARDI JOSEPH F ,  GREGOR LAWRENCE V ,  GROSEWALD PETER SAMUEL ,  REEBER MORTON D

IPC: B23K35/00 ,  H01L21/60 ,  H01L23/532 ,  H01L23/48

Abstract: A ball limiting metallurgy pad structure for a semiconductor device solder bond interconnection comprising: a conductive layer that is adherent to the semiconductor device passivating layer, a relatively thick layer of a material having a high thermal conductivity, a barrier layer that protects the high conductivity layer by physically preventing any interaction or alloying with the subsequent layers, and a layer of a material that is solder wettable.

公开(公告)号：IT8022509D0

公开(公告)日：1980-06-03

申请号：IT2250980

申请日：1980-06-03

Applicant: IBM

Inventor： CHARLES CARPENTER ,  FUGARDI JOSEPH F ,  GREGOR LAWRENCE V ,  PETER GROSEWALD SAMUEL ,  REEBER MORTON D

IPC: B23K35/00 ,  H01L21/60 ,  H01L23/532 ,  H01L

Abstract: A ball limiting metallurgy pad structure for a semiconductor device solder bond interconnection comprising: a conductive layer that is adherent to the semiconductor device passivating layer, a relatively thick layer of a material having a high thermal conductivity, a barrier layer that protects the high conductivity layer by physically preventing any interaction or alloying with the subsequent layers, and a layer of a material that is solder wettable.