公开(公告)号：JP2003243401A

公开(公告)日：2003-08-29

申请号：JP2003019203

申请日：2003-01-28

Applicant: IBM

Inventor： DAVIS CHARLES R ,  HAWKEN DAVID L ,  JUNG DAE YOUNG ,  WILLIAM F LANDERS ,  QUESTAD DAVID L

IPC: H01L21/3205 ,  H01L23/52 ,  H01L23/522 ,  H01L23/532 ,  H01L23/58

Abstract: PROBLEM TO BE SOLVED: To manufacture a mesh-like reinforcing structure inhibiting peeling and cracking in a multilayer semiconductor structure using a low dielectric constant dielectric material and a copper-based metal wire. SOLUTION: A mesh-like interconnecting structure is provided with electrically conductive pads 45 that are interconnected by electrically conductive lines 37 and 38 at each wiring level, and each electrically conductive pad is connected with the adjacent pad at the next wiring level through a plurality of electrically conductive via holes. The electrically conductive pads, lines and via holes are manufactured in a normal BEOL device wiring level integration process. This mesh-like reinforcing structure can be manufactured in the periphery of the device like a chip or in the empty region of the device requiring a connection for inhibiting peeling. COPYRIGHT: (C)2003,JPO

公开(公告)号：JP2004214626A

公开(公告)日：2004-07-29

申请号：JP2003396313

申请日：2003-11-26

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： WILLIAM F LANDERS ,  SHAW THOMAS M ,  LLERA-HURLBURT DIANA ,  CROWDER SCOTT W ,  MCGAHAY VINCENT J ,  MALHOTRA SANDRA G ,  DAVIS CHARLES R ,  RONALD D GOLDBLATT ,  ENGEL BRETT H

IPC: H01L23/52 ,  H01L21/3205 ,  H01L21/822 ,  H01L23/544 ,  H01L27/04

CPC classification number: H01L23/585 ,  H01L22/34 ,  H01L2924/0002 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To obtain improved crack stopping and contaminant barriers for an IC chip. SOLUTION: On-chip overlapped crack end barrier structure is constituted. A conductive material in barrier structure design is used for forming the depth of several conductive layers, by wiring each barrier to a contact pad and a device pin and connecting a monitoring device to a chip. Upper surface deposit, consisting of a material such as polyimide, suppresses peeling off of layers. Other barriers may include structural characteristics for completely shielding moisture absorption and oxidation, as compared with typical crack stopping structure. Thereto, other barriers are constituted so as to give crack stop protection, to be electrically connected to a monitoring device and so as to test the capacitance/resistance of the barrier structure to show the complete states of the barriers to a user. A barrier destroyed by cracks or humidity absorption/oxidation shows deviation in the capacitance/resistance. COPYRIGHT: (C)2004,JPO&NCIPI

公开(公告)号：JP2001127025A

公开(公告)日：2001-05-11

申请号：JP2000273239

申请日：2000-09-08

Applicant: IBM

Inventor： KARL E BOGGS ,  KENNETH M DAVIS ,  WILLIAM F LANDERS ,  MICHAEL F ROFARO ,  ADAM D TEIKKUNOA ,  RONALD D FIIJII

IPC: B24B37/30 ,  B24B37/32 ,  B24B49/12 ,  B24B49/16 ,  H01L21/302 ,  H01L21/304 ,  B24B37/00

Abstract: PROBLEM TO BE SOLVED: To provide a chemical mechanical polishing(CMP) control system for controlling pressure distribution on the back face of a semiconductor wafer to be polished. SOLUTION: This system is provided with a CMP device having a carrier 14 for supporting a semiconductor wafer. The carrier 14 is provided with plural two-way function piezoelectric actuators 41 and 42. The actuators 41 and 42 detect pressure change across the semiconductor wafer, and the actuators 41 and 42 can be individually controlled. A controller connected with the actuators 41 and 42 control the actuators 41 and 42 to apply pressure distribution controlled across the semiconductor wafer by monitoring the detected pressure change.

公开(公告)号：SG87156A1

公开(公告)日：2002-03-19

申请号：SG200004528

申请日：2000-08-16

Applicant: IBM

Inventor： KARL E BOGGS ,  KENNETH M DAVIS ,  WILLIAM F LANDERS ,  MICHAEL F LOFARO ,  ADAM D TICKNOR ,  RONALD D FIEGE

IPC: B24B37/30 ,  B24B37/32 ,  B24B49/12 ,  B24B49/16 ,  H01L21/302 ,  H01L21/304

Abstract: A chemical-mechanical polishing (CMP) control system controls distribution of pressure across the backside of a semiconductor wafer being polished. The system includes a CMP apparatus having a carrier for supporting a semiconductor wafer. The carrier includes a plurality of dual function piezoelectric actuators. The actuators sense pressure variations across the semiconductor wafer and are individually controllable. A control is connected to the actuators for monitoring sensed pressure variations and controlling the actuators to provide a controlled pressure distribution across the semiconductor wafer.