6.
    发明专利
    未知

    公开(公告)号:DE102004009602B4

    公开(公告)日:2009-09-17

    申请号:DE102004009602

    申请日:2004-02-27

    Abstract: A trench transistor has a cell array, in which at least one cell array trench ( 2 ) is provided, and an edge structure framing the cell array. An edge trench ( 15 ) spaced apart from the cell array trenches ( 2 ) is provided in the edge structure.

    7.
    发明专利
    未知

    公开(公告)号:DE10212144B4

    公开(公告)日:2005-10-06

    申请号:DE10212144

    申请日:2002-03-19

    Abstract: The transistor structure has an array of IGBTs (Insulated Gate Bipolar Transistors) side-by-side accommodated in trenches (9). The trenches are connected at one end to a cross-trench (91). There is a gate structure (201), first and second portions (212,202), a source zone and a drain zone. There are metalized areas (20,21) with through contacts (31,32), touching the gate and source structures respectively.

    10.
    发明专利
    未知

    公开(公告)号:DE102004005774B4

    公开(公告)日:2006-09-28

    申请号:DE102004005774

    申请日:2004-02-05

    Abstract: A method for fabrication of gate electrodes in a field-plate (magnetoresistive) trench transistor (1) having one, or more, trenches (3) and mesa zones (8), involves applying a gate electrode layer (7) on to the cell field so that the gate electrode layer (7) within or above the trenches (3) has indentations or pockets, and then applying a mask layer (10) on to the cell field. The mask layer (10) is etched-back so that only within the indentations or pockets of the gate electrode layer (7) does the residual masking layer remain, and the gate electrode layer (7) is etched-back using the residual mask layer (10) as the etching mask so that only within/above the trenches (5) does the residual gate electrode layer remain. An independent claim is given for a magneto resistive trench transistor.

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