公开(公告)号：WO2004040647A9

公开(公告)日：2004-10-21

申请号：PCT/DE0303583

申请日：2003-10-29

Applicant: INFINEON TECHNOLOGIES AG ,  MIKOLAJICK THOMAS ,  MOERT MANFRED ,  PINNOW CAY-UWE

Inventor： MIKOLAJICK THOMAS ,  MOERT MANFRED ,  PINNOW CAY-UWE

IPC: G11C11/22 ,  H01L21/8246 ,  H01L27/115 ,  H01L21/02

CPC classification number: H01L27/11502 ,  G11C11/22 ,  H01L27/11507

Abstract: The invention relates to a ferroelectric memory cell, comprising a ferroelectric tunnel layer (FeTL) which forms the ferroelectric memory cell together with a first electrical conducting region (1) and a second electrical conducting region (2). The ferroelectric tunnel layer (FeTL) is arranged between the both electrical conducting regions (1, 2).

Abstract translation: 根据本发明的铁电存储器单元包括与第一导电区域（1），并与第二导电区域（2），所述铁电存储器单元一起形成铁电体层隧道（远东纺织）。 两个导电区域之间的强电介质隧道层（远东纺织）（1，2）。

公开(公告)号：DE102006017283A1

公开(公告)日：2007-10-18

申请号：DE102006017283

申请日：2006-04-12

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GEILER THOMAS ,  REINIG PETER ,  BLOESS HARALD ,  MOERT MANFRED

IPC: G01B11/24 ,  G01B11/06 ,  G01B11/14 ,  H01L21/66

Abstract: The method involves determining complex reflection coefficients of reflected monochromatic electromagnetic radiation by a detector (50). Ellipsometry parameters are determined from the complex reflection coefficient. A model of an ellipsometry irradiation is provided, where the model combines the ellipsometry parameters with modeled measurements of structural units (14). Measurements of the structural units on a semiconductor wafer (5) are calculated based on the model. An independent claim is also included for a measuring device for measuring structural units of a pattern on a semiconductor wafer.

公开(公告)号：DE10219396A1

公开(公告)日：2003-11-20

申请号：DE10219396

申请日：2002-04-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MOERT MANFRED ,  MIKOLAJICK THOMAS

IPC: G11C11/22

Abstract: The memory cell contains a storage capacitor (C) formed by two electrodes (BE,TE) sandwiching ferroelectric dielectric storage region (F), containing several ferroelectric sections (F1...Fn). Pairs of sections have different characteristics, e.g. electric properties. Due to the different characteristics, can be formed in the sections a corresponding number of binary individual polarisation states (P1...Pn). Thus a number of binary bits can be stored in storage capacitor. Independent claims are included for semiconductor memory and method of operation of the memory cell.

公开(公告)号：DE10250357A1

公开(公告)日：2004-05-19

申请号：DE10250357

申请日：2002-10-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： PINNOW CAY-UWE ,  MIKOLAJICK THOMAS ,  MOERT MANFRED

IPC: G11C11/22 ,  H01L21/8246 ,  H01L27/115 ,  G11C11/36 ,  G11C11/40

公开(公告)号：DE102004006258B4

公开(公告)日：2007-08-02

申请号：DE102004006258

申请日：2004-02-09

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MOERT MANFRED ,  HINGST THOMAS

IPC: G01B21/02 ,  G01B11/02 ,  G01B11/24 ,  G01B11/30 ,  G01B15/04 ,  G01N23/00 ,  H01L21/66

Abstract: Both measuring processes contain respective steps, i.e. measuring first structure width (XCO(1)) of test structure by first measuring process at preset, adjustable height (h1). At least one further parameter is determined by first process to describe fully trapezoidal shape. Then second structure width (XCD(2)) is measured by second process. Second height (h2) is determined front above process results. Then follows adjustment of first height of first process to value of second height to approximate first process to second one.

公开(公告)号：DE102004006258A1

公开(公告)日：2005-08-25

申请号：DE102004006258

申请日：2004-02-09

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MOERT MANFRED ,  HINGST THOMAS

IPC: G01B11/02 ,  G01B11/24 ,  G01B11/30 ,  G01B15/04 ,  G01B21/02 ,  G01N23/00 ,  H01L21/66

Abstract: Both measuring processes contain respective steps, i.e. measuring first structure width (XCO(1)) of test structure by first measuring process at preset, adjustable height (h1). At least one further parameter is determined by first process to describe fully trapezoidal shape. Then second structure width (XCD(2)) is measured by second process. Second height (h2) is determined front above process results. Then follows adjustment of first height of first process to value of second height to approximate first process to second one.

公开(公告)号：DE10125370C1

公开(公告)日：2002-11-14

申请号：DE10125370

申请日：2001-05-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HARTNER WALTER ,  MOERT MANFRED ,  SCHINDLER GUENTHER ,  WEINRICH VOLKER

IPC: H01L21/02 ,  H01L21/314 ,  H01L21/316 ,  H01L21/8239

Abstract: The manufacturing method has a dielectric or ferroelectric layer for integrated capacitors (2) of the semiconductor circuit deposited on an intermediate carrier, which is heated for conversion of the dielectric or ferroelectric layer into a highly polarized phase. The dielectric or ferroelectric layer is subsequently released from the intermediate carrier and reduced into small particles (4) applied to the semiconductor substrate (1) for the semiconductor circuit.