公开(公告)号：DE10202479A1

公开(公告)日：2003-08-07

申请号：DE10202479

申请日：2002-01-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ROSMEIER LUDWIG ,  KRISCHKE NORBERT ,  WERNER WOLFGANG ,  NELLE PETER

IPC: H01L21/76 ,  H01L21/761 ,  H01L27/06 ,  H01L27/088 ,  H01L27/108 ,  H01L29/00 ,  H01L29/06

Abstract: An integrated circuit configuration includes a semiconductor body having a first semiconductor zone of a first conductivity type in a region near a rear side and a second semiconductor zone of the first conductivity type adjoining the first semiconductor zone and doped more weakly than the first semiconductor zone in a region near a front side, a first component region in the body having at least one semiconductor zone of a second conductivity type, a second component region in the body having at least one semiconductor zone of the second conductivity type, and a conversion structure having a semiconductor zone of the second conductivity type and a semiconductor zone of the first conductivity type that are short-circuited and disposed at a distance from the first semiconductor zone between the first and second component regions in the second semiconductor zone.

公开(公告)号：DE10342990A1

公开(公告)日：2005-05-25

申请号：DE10342990

申请日：2003-09-17

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ROSMEIER LUDWIG ,  THIELE STEFFEN

IPC: G01R19/165 ,  G01R31/28 ,  G01R31/26

Abstract: A cell type power transistor (100) load current measurement procedure measures obtains the potential difference between points (Se1, 2) with maximum separation in the current flow direction across insulated areas on the flat contact (30) surface (10) using weighting of values measured (32) at several points. Independent claims are included for equipment using the procedure.

公开(公告)号：DE10343083B4

公开(公告)日：2006-03-23

申请号：DE10343083

申请日：2003-09-17

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ROSMEIER LUDWIG ,  RACKI MATHIAS ,  ZUNDEL MARKUS ,  SANDER RAINALD ,  THIELE STEFFEN

IPC: H01L23/544 ,  H01L21/66 ,  H01L23/58 ,  H01L29/06 ,  H01L29/40 ,  H01L29/423 ,  H01L29/78

公开(公告)号：DE10343278B4

公开(公告)日：2006-01-05

申请号：DE10343278

申请日：2003-09-18

Applicant: INFINEON TECHNOLOGIES AG

Inventor： THIELE STEFFEN ,  SANDER RAINALD ,  ROSMEIER LUDWIG

IPC: H02M1/00 ,  H02M1/08 ,  H02M1/38

公开(公告)号：DE10343278A1

公开(公告)日：2005-04-21

申请号：DE10343278

申请日：2003-09-18

Applicant: INFINEON TECHNOLOGIES AG

Inventor： THIELE STEFFEN ,  SANDER RAINALD ,  ROSMEIER LUDWIG

IPC: H02M1/00 ,  H02M1/38 ,  H02M1/08

Abstract: The half bridge circuit has a pair of semiconductor switches (M1,M2) connected in series between 2 supply potential terminals, each controlled by a control signal from a respective control circuit (11,21) and provided with a switch state detection circuit (12,22), supplying a signal to a blocking circuit (13,23), in turn supplying a release signal for the control circuit of the opposite semiconductor switch.

公开(公告)号：DE102004037543A1

公开(公告)日：2006-03-16

申请号：DE102004037543

申请日：2004-08-03

Applicant: INFINEON TECHNOLOGIES AG

Inventor： THIELE STEFFEN ,  SANDER RAINALD ,  ROSMEIER LUDWIG ,  KOEPPL BENNO ,  MARTINS CARLOS

IPC: H02H7/12 ,  H02M1/00 ,  H02M1/08 ,  H02M1/32

Abstract: The device has a half bridge with two branches and detector units measuring an overload. A control logic controls switches (M1, M2) based on output signals of the units such that the overloaded switch is isolated for a certain time period if an overload threshold exceeds in the branches. Filters and flip flops disconnect the logic when determining the overload during the period within one of the branch and disconnect the switch (M2).

公开(公告)号：DE10343083A1

公开(公告)日：2005-04-14

申请号：DE10343083

申请日：2003-09-17

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ROSMEIER LUDWIG ,  RACKI MATHIAS ,  ZUNDEL MARKUS ,  SANDER RAINALD ,  THIELE STEFFEN

IPC: H01L23/58 ,  H01L29/06 ,  H01L29/40 ,  H01L29/423 ,  H01L29/78 ,  H01L23/544 ,  H01L21/66

Abstract: Transistor type semiconductor module (1) comprises semiconductor structure (2) with several, mutually insulated gates (6) coupled to gate energizer. At least one gate is separated from gate energizer and serves as potential measuring line after coupling to potential meter.Preferably gate(s), serving as measuring line, are linked to certain points of module so that potentials at these points can be determined via gates. Typically contact film (3) is deposited on semiconductor structure for contacting source or body regions.

公开(公告)号：DE10322719A1

公开(公告)日：2005-01-05

申请号：DE10322719

申请日：2003-05-20

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ROSMEIER LUDWIG ,  HOEGLAUER JOSEF ,  SCHREDL JUERGEN

IPC: H01L23/495 ,  H01L25/065 ,  H01L23/49

Abstract: The circuit arrangement has several unhoused integrated circuit chips on top of each other in a housing, whereby at least one lower base chip (1) acts as a carrier for at least one top chip (2a,2b,3) mounted above it. The at least one top chip is mounted on the base chip or chips so that the base chip or chips do or does not fully support the at least one top chip. An independent claim is also included for the following: (1) a method of manufacturing an inventive circuit arrangement.