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    PROCESS OF FORMING A FERROELECTRIC MEMORY INTEGRATED CIRCUIT
    1.
    发明申请
    PROCESS OF FORMING A FERROELECTRIC MEMORY INTEGRATED CIRCUIT 审中-公开
    形成电磁记忆集成电路的过程

    公开(公告)号：WO2004077438A2

    公开(公告)日：2004-09-10

    申请号：PCT/EP2004001695

    申请日：2004-02-20

    Applicant: INFINEON TECHNOLOGIES AG ,  HILLIGER ANDREAS ,  WELLHAUSEN UWE

    Inventor： HILLIGER ANDREAS ,  WELLHAUSEN UWE

    IPC: G11C20060101 ,  G11C11/22 ,  H01L21/00 ,  H01L21/02 ,  H01L21/768 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/108 ,  H01L27/115 ,  G11C

    CPC classification number: H01L28/55 ,  G11C11/22 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76832 ,  H01L27/11502 ,  H01L28/65 ,  H01L28/75

    Abstract: A memory cell having a capacitor with top and bottom electrodes with a dielectric layer between is described. The bottom electrode is coupled to a first diffusion region of a transistor by a bottom electrode plug. A dielectric layer covers the capacitor. Above the dielectric layer is a first barrier layer. A via is created in the dielectric layer in which a plug is formed to couple to the second diffusion region. The via comprises substantially vertical sidewalls. A second barrier layer lines the sidewalls of the via. A conductive material is then deposited on the substrate, filling the via to form the plug. By providing the first and second barrier layers, the diffusion of hydrogen which can adversely impact the capacitor is reduced, thereby improving the reliability.

    Abstract translation: 描述了具有具有介电层之间的顶部和底部电极的电容器的存储单元。 底部电极通过底部电极插塞耦合到晶体管的第一扩散区域。 电介质层覆盖电容器。 电介质层之上是第一阻挡层。 在其中形成有插塞以耦合到第二扩散区域的电介质层中形成通孔。 通孔包括基本垂直的侧壁。 第二阻挡层对通孔的侧壁进行排列。 然后将导电材料沉积在衬底上，填充通孔以形成插头。 通过设置第一和第二阻挡层，可以减小可能不利地影响电容器的氢的扩散，从而提高可靠性。

    4.
    发明专利
    未知

    公开(公告)号：DE10356097B4

    公开(公告)日：2008-01-31

    申请号：DE10356097

    申请日：2003-11-27

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： WELLHAUSEN UWE ,  BRUCHHAUS RAINER ,  NAGEL NICOLAS ,  GERNHARDT STEFAN ,  LIAN JENNY ,  HILLINGER ANDREAS

    IPC: H01L21/283 ,  H01L21/02 ,  H01L21/768 ,  H01L21/8239 ,  H01L23/48

    Abstract: The invention includes a wafer having a poly silicon plug passing through a CP-contact. The poly silicon plug is formed from a relatively heavily doped poly silicon layer and a relatively lightly doped poly silicon layer. The relatively lightly doped poly silicon layer passes through the relatively heavily doped poly silicon layer to extend beyond the relatively heavily doped poly silicon layer towards the surface of the wafer. A barrier layer covers top and side walls of the relatively lightly doped poly silicon layer for reducing oxidation at the surface of the poly silicon plug. The wafer is fabricated by depositing a relatively heavily doped poly silicon layer in a CP-contact, depositing a relatively lightly doped poly silicon layer to pass through the relatively heavily doped poly silicon layer, and depositing a barrier layer to cover top and side walls of the relatively lightly doped poly silicon layer to reduce oxidation at the surface of the poly silicon plug.

    5.
    发明专利
    未知

    公开(公告)号：DE112004001321T5

    公开(公告)日：2006-06-01

    申请号：DE112004001321

    申请日：2004-07-02

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： HILLINGER ANDREAS ,  LIAN JINGYU ,  NAGEL NICOLAS ,  BRUCHHAUS RAINER ,  GERNHARDT STEPHAN ,  WELLHAUSEN UWE ,  MOON BUM-KI ,  HORNIK KARL

    IPC: H01L21/02 ,  H01G4/06 ,  H01G4/12 ,  H01G4/33 ,  H01L21/8246 ,  H01L27/115

    Abstract: A multi-layer barrier for a ferroelectric capacitor includes an outdiffusion barrier layer permeable to both hydrogen and oxygen. The outdiffusion barrier layer covers the ferroelectric of the capacitor. Oxygen passes through the outdiffusion barrier layer into the ferroelectric during an oxygen anneal in order to repair damage to the ferroelectric caused during etching. The outdiffusion barrier layer reduces the decomposition of the ferroelectric by blocking molecules leaving the ferroelectric during the oxygen anneal. The multi-layer barrier also includes a hydrogen barrier layer deposited on the outdiffusion barrier layer after repair of the ferroelectric by the oxygen anneal. The hydrogen barrier layer allows the multi-layer barrier to block the passage of hydrogen into the ferroelectric during back-end processes.

    7.
    发明专利
    未知

    公开(公告)号：DE10356097A1

    公开(公告)日：2004-06-17

    申请号：DE10356097

    申请日：2003-11-27

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： WELLHAUSEN UWE ,  BRUCHHAUS RAINER ,  NAGEL NICOLAS ,  GERNHARDT STEFAN ,  LIAN JENNY ,  HILLIGER ANDREAS

    IPC: H01L21/02 ,  H01L21/768 ,  H01L27/105 ,  H01L21/8239

    Abstract: The invention includes a wafer having a poly silicon plug passing through a CP-contact. The poly silicon plug is formed from a relatively heavily doped poly silicon layer and a relatively lightly doped poly silicon layer. The relatively lightly doped poly silicon layer passes through the relatively heavily doped poly silicon layer to extend beyond the relatively heavily doped poly silicon layer towards the surface of the wafer. A barrier layer covers top and side walls of the relatively lightly doped poly silicon layer for reducing oxidation at the surface of the poly silicon plug. The wafer is fabricated by depositing a relatively heavily doped poly silicon layer in a CP-contact, depositing a relatively lightly doped poly silicon layer to pass through the relatively heavily doped poly silicon layer, and depositing a barrier layer to cover top and side walls of the relatively lightly doped poly silicon layer to reduce oxidation at the surface of the poly silicon plug.

    8.
    发明专利
    未知

    公开(公告)号：DE102004054818A1

    公开(公告)日：2006-06-01

    申请号：DE102004054818

    申请日：2004-11-12

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： WELLHAUSEN UWE

    IPC: H01L21/316 ,  H01L23/28

    Abstract: In a method for the reversible oxidation protection of microcomponents, a substrate is provided, a silicon nitride layer is provided on the substrate in order to protect it against oxidation, an insulation layer is applied to the silicon nitride layer, and a reoxidation process is carried out. In the reoxidation process are generated oxygen radicals which are passed through the insulation layer to the silicon nitride layer in order to convert silicon nitride of the nitride layer into silicon dioxide.

    10.
    发明专利
    未知

    公开(公告)号：DE102004028851A1

    公开(公告)日：2005-10-20

    申请号：DE102004028851

    申请日：2004-06-15

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： BLOESS HARALD ,  WELLHAUSEN UWE ,  REINIG PETER ,  WEIDNER PETER ,  GUITTET PIERRE-YVES ,  MANTZ ULRICH

    IPC: G01B21/16 ,  G01B21/20 ,  G01B21/30 ,  G21K7/00 ,  H01L21/66

    Abstract: In order to measure a surface profile of a sample, an imprint of the surface profile to be examined is produced in a transfer material. The sample contains processed semiconductor material and is in particular a patterned semiconductor wafer or part of a patterned semiconductor wafer. The transfer material is deformable and curable under suitable ambient conditions. The transfer material may be a thermoplastic material or a material which is deformable as desired after application on a substrate and cures in one case by means of irradiation with photons having a suitable wavelength or alternatively heating. The transfer material may be configured in such a way that the imprint produced is the same size as or alternatively of smaller size than the surface profile. The imprint produced is subsequently measured by known methods.

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