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    Method for manufacturing non-volatile semiconductor memory cell having separate tunnel window
    1.
    发明专利
    Method for manufacturing non-volatile semiconductor memory cell having separate tunnel window 审中-公开
    制造具有分离式隧道窗的非挥发性半导体存储单元的方法

    公开(公告)号：JP2006319362A

    公开(公告)日：2006-11-24

    申请号：JP2006197022

    申请日：2006-07-19

    Applicant: Infineon Technologies Ag ,  インフィネオン テクノロジーズ アクチエンゲゼルシャフト

    Inventor： WAWER PETER ,  SPRINGMANN OLIVER ,  WOLF KONRAD ,  HEITZSCH OLAF ,  HUCKELS KAI ,  RENNEKAMP REINHOLD ,  ROEHRICH MAYK ,  STEIN VON KAMIENSKI ELARD ,  KUTTER CHRISTOPH ,  LUDWIG CHRISTOPH

    IPC: H01L21/8247 ,  H01L21/336 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

    CPC classification number: H01L29/66825 ,  H01L29/7883

    Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing a non-volatile semiconductor memory cell (SZ) having a separate tunnel window cell (TF).
    SOLUTION: The method includes the step for forming the window cell (TF) having a tunnel zone (TG), a tunnel layer (4), a tunnel window memory layer (T5), a dielectric tunnel window layer (T6), and a tunnel window control electrode layer (T7), and the step for forming a transistor memory cell (TZ) having a channel zone (KG), a gate layer (3), a memory layer (5), a dielectric layer (6), and a control electrode layer (7). By the manufacturing method, the tunnel zone (TG) is formed in a late implantation step by tunnel implantation (I
    T ) using the window cell (TF) as a mask. The resulting memory cell has a small area requirement and a high number of program/clear cycles.
    COPYRIGHT: (C)2007,JPO&INPIT

    Abstract translation: 要解决的问题：提供一种制造具有单独的隧道窗口单元（TF）的非易失性半导体存储单元（SZ）的方法。 解决方案：该方法包括用于形成具有隧道区（TG），隧道层（4），隧道窗口存储层（T5），电介质隧道窗口层（T6）的窗口单元（TF） ，和隧道窗口控制电极层（T7），以及用于形成具有沟道区（KG）的晶体管存储单元（TZ），栅极层（3），存储层（5），电介质层 6）和控制电极层（7）。 通过制造方法，使用窗口单元（TF）作为掩模，通过隧道注入（I SB> T SB）在后期注入步骤中形成隧道区（TG）。 所得到的存储单元具有小的面积要求和大量的编程/清除周期。 版权所有（C）2007，JPO＆INPIT

    2.
    发明专利
    未知

    公开(公告)号：AT332573T

    公开(公告)日：2006-07-15

    申请号：AT01943320

    申请日：2001-05-04

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： MUELLER KARL-HEINZ ,  WOLF KONRAD

    IPC: H01L21/331

    Abstract: Production of a bipolar transistor comprises preparing a semiconductor substrate having a conducting region; applying a first insulating layer, a conducting layer and a second insulating layer to the substrate; applying a mask; anisotropically etching the insulating layers and isotropically etching the conducting layer to form an opening; forming a collector and a base in the opening by selective epitaxy; and producing an emitter. Preferred Features: The first insulating layer is made from silicon oxide. The second insulating layer is made from silicon nitride or silicon oxide. The conducting layer is made from polycrystalline silicon. The emitter is produced by a polycrystalline silicon deposition or by epitaxial deposition. The base has a layer of silicon-germanium.

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