SEMICONDUCTOR MEMORY CELLS
    6.
    发明申请

    公开(公告)号:WO2004027841A3

    公开(公告)日:2004-08-12

    申请号:PCT/EP0310117

    申请日:2003-09-11

    CPC classification number: H01L27/11502 H01L21/76895 H01L27/11507 H01L28/60

    Abstract: A capacitor with improved reliability is disclosed. The capacitor includes a bottom electrode, a top electrode, and an intermediate layer therebetween. A contact, which is electrically coupled to the top electrode, is provided. At least a portion of the contact is offset from the capacitor. By offsetting the contact from the top electrode, the etch damage to the top electrode is reduced, thereby reducing or eliminating the need for the anneal to repair the etch damage.

    Abstract translation: 公开了具有可靠性提高的电容器。 电容器包括底部电极,顶部电极和它们之间的中间层。 提供了电耦合到顶部电极的触点。 触点的至少一部分偏离电容器。 通过抵消与顶部电极的接触,对顶部电极的蚀刻损伤减小,从而减少或消除了退火以修复蚀刻损伤的需要。

    BARRIER FOR CAPACITOR OVER PLUG STRUCTURES
    7.
    发明申请
    BARRIER FOR CAPACITOR OVER PLUG STRUCTURES 审中-公开
    用于电容结构的电容器的阻挡层

    公开(公告)号:WO03092051A2

    公开(公告)日:2003-11-06

    申请号:PCT/EP0304079

    申请日:2003-04-17

    CPC classification number: H01L28/55 H01L27/11502

    Abstract: An improved barrier stack for reducing plug oxidation in capacitor-over-plug structures is disclosed. The barrier stack is formed on a non-conductive adhesion layer of titanium oxide. The barrier stack includes first and second barrier layers wherein the second barrier layer covers the top surface and sidewalls of the first barrier layer. In one embodiment, the first barrier layer comprises Ir and the second barrier layer comprises IrOx. Above the barrier stack is formed a capacitor.

    Abstract translation: 公开了一种用于减少电容器插头结构中的插塞氧化的改进的阻挡层。 势垒堆叠形成在氧化钛的非导电性粘合层上。 势垒堆叠包括第一和第二阻挡层,其中第二阻挡层覆盖第一阻挡层的顶表面和侧壁。 在一个实施例中,第一阻挡层包括Ir,第二阻挡层包含IrOx。 势垒叠层上方形成电容器。

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