Method of manufacturing thin-film bulk acoustic resonator filter, and circuit using the filter
    1.
    发明专利
    Method of manufacturing thin-film bulk acoustic resonator filter, and circuit using the filter 有权
    制造薄膜大容量谐振谐振滤波器的方法和使用滤波器的电路

    公开(公告)号:JP2010063142A

    公开(公告)日:2010-03-18

    申请号:JP2009254140

    申请日:2009-11-05

    CPC classification number: H03H9/564 H03H3/02 Y10T29/42

    Abstract: PROBLEM TO BE SOLVED: To provide a better method of forming a thin-film bulk acoustic resonator filter. SOLUTION: In the method of manufacturing a thin-film bulk acoustic resonator filer, a thin-film bulk acoustic resonator filter 10 includes a plurality of thin-film bulk acoustic resonators 38a to 38g series-connected and branched on the same film 35. The thin-film bulk acoustic resonators 38a to 38g are made of a single common lower conductive layer to have respective bottom electrodes of the thin-film bulk acoustic resonators. The single common conductive layer is provided to form respective upper electrodes of the thin-film bulk acoustic resonators 38a to 38g. A common piezoelectric thin-film layer, which may or may not be patterned, is formed as a thin film continuous as a single or not continuous. COPYRIGHT: (C)2010,JPO&INPIT

    Abstract translation: 要解决的问题:提供一种更好的形成薄膜体声波谐振器滤波器的方法。 解决方案:在制造薄膜体声波谐振器滤波器的方法中,薄膜体声波谐振器滤波器10包括在相同的膜上串联和分支的多个薄膜体声波谐振器38a至38g 薄膜体声共振器38a至38g由单个公共下导电层制成,以具有薄膜体声波谐振器的相应底部电极。 提供单个公共导电层以形成薄膜体声波谐振器38a至38g的相应上电极。 可以或可以不被图案化的公共压电薄膜层作为单独的或不连续的连续的薄膜形成。 版权所有(C)2010,JPO&INPIT

    VERTICAL MIRROR IN A SILICON PHOTONIC CIRCUIT
    3.
    发明申请
    VERTICAL MIRROR IN A SILICON PHOTONIC CIRCUIT 审中-公开
    硅光子电路中的垂直镜像

    公开(公告)号:WO2011037742A2

    公开(公告)日:2011-03-31

    申请号:PCT/US2010047987

    申请日:2010-09-07

    CPC classification number: H01L31/02327 G02B6/4214

    Abstract: A vertical total internal reflection (TIR) mirror and fabrication thereof is made by creating a re-entrant profile using crystallographic silicon etching. Starting with an SOI wafer, a deep silicon etch is used to expose the buried oxide layer, which is then wet-etched (in HF), opening the bottom surface of the Si device layer. This bottom silicon surface is then exposed so that in a crystallographic etch, the resulting shape is a re-entrant trapezoid with facets. These facets can be used in conjunction with planar silicon waveguides to reflect the light upwards based on the TIR principle. Alternately, light can be coupled into the silicon waveguides from above the wafer for such purposes as wafer level testing.

    Abstract translation: 垂直全内反射(TIR)反射镜及其制造是通过使用晶体硅蚀刻产生凹入轮廓而制成的。 从SOI晶片开始,使用深硅蚀刻来暴露掩埋氧化物层,然后对其进行湿蚀刻(在HF中),从而打开Si器件层的底表面。 然后暴露该底部硅表面,以便在晶体蚀刻中,所得到的形状是具有小平面的凹入梯形。 根据TIR原理,这些刻面可以与平面硅波导结合使用,以向上反射光线。 或者,可以从晶圆上方将光耦合到硅波导中以用于晶圆级测试等目的。

    MANUFACTURING FILM BULK ACOUSTIC RESONATOR FILTERS
    4.
    发明申请
    MANUFACTURING FILM BULK ACOUSTIC RESONATOR FILTERS 审中-公开
    制造膜散装声学谐振器滤波器

    公开(公告)号:WO2004036744A3

    公开(公告)日:2004-07-22

    申请号:PCT/US0324142

    申请日:2003-08-01

    Applicant: INTEL CORP

    CPC classification number: H03H9/564 H03H3/02 Y10T29/42

    Abstract: A film bulk acoustic resonator filter may be formed with a plurality of interconnected series and shunt film bulk acoustic resonators formed on the same membrane. Each of the film bulk acoustic resonators may be formed from a common lower conductive layer which is defined to form the bottom electrode of each film bulk acoustic resonator. A common top conductive layer may be defined to form each top electrode of each film bulk acoustic resonator. A common piezoelectric film layer, that may or may not be patterned, forms a continuous or discontinuous film.

    Abstract translation: 薄膜体声波谐振器滤波器可以形成有在相同膜上形成的多个互连的串联和分流膜体声波谐振器。 每个薄膜体声波谐振器可以由共同的下导电层形成,该下导电层被限定为形成每个薄膜体声波谐振器的下电极。 可以限定公共顶部导电层以形成每个薄膜体声波谐振器的每个顶部电极。 常见的压电薄膜层可以或不可以被图案化,形成连续或不连续的薄膜。

    ON-CHIP DIFFRACTION GRATING PREPARED BY CRYSTALLOGRAPHIC WET-ETCH
    5.
    发明申请
    ON-CHIP DIFFRACTION GRATING PREPARED BY CRYSTALLOGRAPHIC WET-ETCH 审中-公开
    晶体湿蚀刻制备的芯片衍射衍射

    公开(公告)号:WO2013106008A3

    公开(公告)日:2013-10-03

    申请号:PCT/US2012030759

    申请日:2012-03-27

    CPC classification number: G02B5/1857 G02B5/1842 G02B5/1861 G02B6/02009

    Abstract: Methods of forming microelectronic structures are described. Embodiments of those methods may include forming a photomask on a (110) silicon wafer substrate, wherein the photomask comprises a periodic array of parallelogram openings, and then performing a timed wet etch on the (110) silicon wafer substrate to form a diffraction grating structure that is etched into the (110) silicon wafer substrate.

    Abstract translation: 描述形成微电子结构的方法。 这些方法的实施例可以包括在(110)硅晶片衬底上形成光掩模,其中光掩模包括平行四边形开口的周期性阵列,然后在(110)硅晶片衬底上执行定时湿蚀刻以形成衍射光栅结构 被蚀刻到(110)硅晶片衬底中。

    7.
    发明专利
    未知

    公开(公告)号:DE60318283D1

    公开(公告)日:2008-02-07

    申请号:DE60318283

    申请日:2003-07-24

    Applicant: INTEL CORP

    Abstract: A film bulk acoustic resonator filter (10) may be formed with a plurality of interconnected series and shunt film bulk acoustic resonators (38) formed on the same membrane (35). Each of the film bulk acoustic resonators (38) may be formed from a common lower conductive layer which is defined to form the bottom electrode (32) of each film bulk acoustic resonator (38). A common top conductive layer may be defined to form each top electrode (36) of each film bulk acoustic resonator (38). A common piezoelectric film layer (34), that may or may not be patterned, forms a continuous or discontinuous film.

    PACKAGING MICROELECTROMECHANICAL STRUCTURES

    公开(公告)号:AU2003212969A1

    公开(公告)日:2003-10-13

    申请号:AU2003212969

    申请日:2003-02-07

    Applicant: INTEL CORP

    Abstract: A MEMS device may be formed in a hermetic cavity by sealing a pair of semiconductor structures to one another, enclosing the MEMS device. The two structures may be coupled using surface mount techniques as one example, so that the temperatures utilized may be compatible with many MEMS applications. Electrical interconnection layers in one or the other of these structures may be utilized to allow electrical interconnections from the exterior world to the MEMS components within the cavity.

    INVERTED 45 DEGREE MIRROR FOR PHOTONIC INTEGRATED CIRCUITS
    10.
    发明申请
    INVERTED 45 DEGREE MIRROR FOR PHOTONIC INTEGRATED CIRCUITS 审中-公开
    用于光子集成电路的反面45度镜面

    公开(公告)号:WO2014004068A3

    公开(公告)日:2014-03-06

    申请号:PCT/US2013045027

    申请日:2013-06-10

    Applicant: INTEL CORP

    Abstract: Inverted 45° semiconductor mirrors as vertical optical couplers for PIC chips, particularly optical receivers and transmitters. An inverted 45° semiconductor mirror functions to couple light between a plane in the PIC chip defined by thin film layers and a direction normal to a top surface of the PIC chip where it may be generated or collected by an off-chip component, such as a wire terminal. In an exemplary embodiment, a (110) plane of a cubic crystalline semiconductor may provide a 45° facet inverted relative to a (100) surface of the semiconductor from which light is to be emitted. In further embodiments, a (110) plane may be exposed by undercutting a device layer of a semiconductor on insulator (SOI) substrate. Alternatively, a pre-etched substrate surface may be bonded to a handling wafer, thinned, and then utilized for PIC waveguide formation.

    Abstract translation: 倒置45°半导体镜作为PIC芯片的垂直光耦合器,特别是光接收器和发射器。 倒置的45°半导体反射镜用于在由薄膜层限定的PIC芯片中的平面与垂直于PIC芯片顶表面的方向之间耦合光,其中PIC芯片的平面可由芯片外部件生成或收集,例如 一个电线终端。 在示例性实施例中,立方晶体半导体的(110)平面可以提供相对于要从其发射光的半导体的(100)表面反转的45°小平面。 在进一步的实施例中,可以通过底切半导体绝缘体(SOI)衬底的器件层来暴露(110)平面。 或者,可以将预先蚀刻的衬底表面结合到处理晶片,变薄,然后用于PIC波导形成。

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