公开(公告)号：KR20180021106A

公开(公告)日：2018-02-28

申请号：KR20187002082

申请日：2015-06-27

Applicant: INTEL CORP

Inventor： LE VAN H ,  DEWEY GILBERT ,  CHU KUNG BENJAMIN ,  AGRAWAL ASHISH ,  METZ MATTHEW V ,  RACHMADY WILLY ,  FRENCH MARC C ,  KAVALIEROS JACK T ,  RIOS RAFAEL ,  KIM SEIYON ,  SUNG SEUNG HOON ,  GARDNER SANAZ K ,  POWERS JAMES M ,  TAFT SHERRY R

IPC: H01L29/66 ,  H01L29/10 ,  H01L29/73 ,  H01L29/78

CPC classification number: H01L29/78 ,  H01L29/1054 ,  H01L29/66795 ,  H01L29/785

Abstract: 방법이기판상의접합영역들사이에디바이스의비-평면도전채널을형성하는단계 - 기판은그 채널밑에차단재료를포함하며, 차단재료는캐리어누설을억제하는성질을포함함 - ; 및그 채널상에게이트스택 - 게이트스택은유전체재료와게이트전극을포함함 - 을형성하는단계를포함한다. 방법이반도체기판상에버퍼재료 - 버퍼재료는기판과상이한격자구조를포함하는반도체재료를포함함 - 를형성하는단계; 버퍼재료상에차단재료 - 차단재료는캐리어누설을억제하는성질을포함함 - 를형성하는단계; 및기판상에트랜지스터디바이스를형성하는단계를포함한다. 장치가채널밑에차단재료 - 차단재료는캐리어누설을억제하는성질을포함함 - 를포함하는기판상에배치된채널을포함하는트랜지스터디바이스를포함하는, 기판상의비-평면멀티-게이트디바이스를포함한다.

Abstract translation: 所述方法包括以下步骤：在衬底上的结区之间形成器件的非平面导电沟道，所述衬底在所述沟道下方包括阻挡材料，并且所述阻挡材料包括抑制载流子泄漏的特性; 并且其中沟道上的栅极堆叠栅极堆叠包括电介质材料和栅极电极。 所述方法包括在半导体衬底上形成缓冲材料，所述缓冲材料包括含有不同于所述衬底的晶格结构的半导体材料; 在缓冲材料上形成阻挡材料，阻挡材料包括抑制载流子泄漏的特性; 并在衬底上形成晶体管器件。 所述衬底上的栅极器件包括晶体管器件，所述晶体管器件包括设置在衬底上的沟道，所述衬底包括在所述沟道下方包括阻挡材料的器件和所述阻挡材料， 。

公开(公告)号：SG11201600820PA

公开(公告)日：2016-03-30

申请号：SG11201600820P

申请日：2013-09-04

Applicant: INTEL CORP

Inventor： MUKHERJEE NILOY ,  GOEL NITI ,  GARDNER SANAZ K ,  PATHI PRAGYANSRI ,  METZ MATTHEW V ,  DASGUPTA SANSAPTAK ,  SUNG SEUNG HOON ,  POWERS JAMES M ,  DEWEY GILBERT ,  CHU-KUNG BENJAMIN ,  KAVALIEROS JACK T ,  CHAU ROBERT S

IPC: H01L21/20

Abstract: Trenches (and processes for forming the trenches) are provided that reduce or prevent crystaline defects in selective epitaxial growth of type III-V or Germanium (Ge) material (e.g., a “buffer” material) from a top surface of a substrate material. The defects may result from collision of selective epitaxial sidewall growth with oxide trench sidewalls. Such trenches include (1) a trench having sloped sidewalls at an angle of between 40 degrees and 70 degrees (e.g., such as 55 degrees) with respect to a substrate surface; and/or (2) a combined trench having an upper trench over and surrounding the opening of a lower trench (e.g., the lower trench may have the sloped sidewalls, short vertical walls, or tall vertical walls). These trenches reduce or prevent defects in the epitaxial sidewall growth where the growth touches or grows against vertical sidewalls of a trench it is grown in.

公开(公告)号：DE112011106054T5

公开(公告)日：2014-09-11

申请号：DE112011106054

申请日：2011-12-28

Applicant: INTEL CORP

Inventor： MUKHERJEE NILOY ,  METZ MATTHEW V ,  POWERS JAMES M ,  LE VAN H ,  CHU-KING BENJAMIN ,  LEMAY MARK R ,  RADOSAVLJEVIC MARKO ,  TOLCHINSKY PETER G ,  CHAU ROBERT S ,  GOEL NITI ,  CHOW LOREN ,  KAVALIEROS JACK T

IPC: H01L21/20 ,  H01L29/778

Abstract: Die Verfahren der Bildung von Hetero-Schichten mit reduzierter Oberflächenrauhigkeit und Defektdichte auf ortsfremden Oberflächen und die dadurch gebildeten Bauelemente werden beschrieben. In einer Ausführungsform beinhaltet das Verfahren die Bereitstellung eines Substrats mit einer Deckfläche mit einer Gitterkonstante und das Auftragen einer ersten Schicht auf der Deckfläche des Substrats. Die erste Schicht hat eine Deckfläche mit einer Gitterkonstante, die sich von der Gitterkonstante der Deckfläche des Substrats unterscheidet. Die erste Schicht wird geglüht und poliert, um eine polierte Oberfläche zu bilden. Eine zweite Schicht wird dann über der polierten Oberfläche aufgetragen.

公开(公告)号：EP3042390A4

公开(公告)日：2017-04-12

申请号：EP13892844

申请日：2013-09-04

Applicant: INTEL CORP ,  GOEL NITI ,  PATHI PRAGYANSRI ,  DASGUPTA SANSAPTAK ,  POWERS JAMES M ,  CHU-KUNG BENJAMIN ,  CHAU ROBERT S

Inventor： MUKHERJEE NILOY ,  GOEL NITI ,  GARDNER SANAZ K ,  PATHI PRAGYANSRI ,  METZ MATTHEW V ,  DASGUPTA SANSAPTAK ,  SUNG SEUNG HOON ,  POWERS JAMES M ,  DEWEY GILBERT ,  CHU-KUNG BENJAMIN ,  KAVALIEROS JACK T ,  CHAU ROBERT S

IPC: H01L21/20 ,  H01L21/762

CPC classification number: H01L21/02694 ,  H01L21/02381 ,  H01L21/02516 ,  H01L21/02532 ,  H01L21/02538 ,  H01L21/02609 ,  H01L21/02636 ,  H01L21/02639 ,  H01L21/76224 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823878 ,  H01L21/8258 ,  H01L27/0924 ,  H01L29/045 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/267 ,  H01L29/7848

Abstract: Trenches (and processes for forming the trenches) are provided that reduce or prevent crystaline defects in selective epitaxial growth of type III-V or Germanium (Ge) material (e.g., a “buffer” material) from a top surface of a substrate material. The defects may result from collision of selective epitaxial sidewall growth with oxide trench sidewalls. Such trenches include (1) a trench having sloped sidewalls at an angle of between 40 degrees and 70 degrees (e.g., such as 55 degrees) with respect to a substrate surface; and/or (2) a combined trench having an upper trench over and surrounding the opening of a lower trench (e.g., the lower trench may have the sloped sidewalls, short vertical walls, or tall vertical walls). These trenches reduce or prevent defects in the epitaxial sidewall growth where the growth touches or grows against vertical sidewalls of a trench it is grown in.