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公开(公告)号:WO03096170A2
公开(公告)日:2003-11-20
申请号:PCT/US0310428
申请日:2003-04-02
Applicant: INTEL CORP
Inventor: CUI YING , SAMSON ERIC , BERKOVITS ARIEL , NAVALE ADITYA , WYATT DAVID , CLINE LESLIE , TSANG JOSEPH , BLAKE MARK , POISNER DAVID , STEVENS WILLIAM JR , SAR-DESSAI VIJAY
CPC classification number: G06F1/3228 , G06F1/3215 , G06F1/324 , G06F1/325 , G06F1/3296 , Y02D10/126 , Y02D10/172
Abstract: In one embodiment of the invention, an integrated device is described that employs a mechanism to control power consumption of a graphics memory controller hub (GMCH) through both voltage and frequency adjustment of clock signal received from a clock generator. The GMCH comprises a graphics core and a circuit to alter operational behavior, such as the frequency of a render clock signal supplied to the graphics core. The circuit is adapted to monitor idleness of the graphics core and reduce a frequency level of the render clock signal if the idleness exceeds a determined percentage of time.
Abstract translation: 在本发明的一个实施例中,描述了一种集成装置,其采用机制来通过从时钟发生器接收的时钟信号的电压和频率调整来控制图形存储器控制器集线器(GMCH)的功率消耗。 GMCH包括图形核心和改变操作行为的电路,例如提供给图形核心的渲染时钟信号的频率。 该电路适用于监视图形核心的空闲,并且如果闲置时间超过确定的时间百分比,则降低渲染时钟信号的频率水平。
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2.
公开(公告)号:WO2006039593A2
公开(公告)日:2006-04-13
申请号:PCT/US2005035373
申请日:2005-09-29
Applicant: INTEL CORP , KATARIA MUKESH , GAFKEN ANDREW , STEVENS WILLIAM JR
Inventor: KATARIA MUKESH , GAFKEN ANDREW , STEVENS WILLIAM JR
IPC: G06F11/30
CPC classification number: G06F11/1433 , G06F8/65
Abstract: Embodiments include monitoring a computing system to determine whether firmware of the computing system is corrupted, hung up, or requires automatic update. The computing system may then request firmware update data over a network. Moreover, the computing system may include a controller with capability to determine whether the firmware is corrupted or hung and request and receive firmware update data over a network. In addition, the controller may have the capability operate when the firmware is corrupted or hung up, if the processor is held up, and if the operating system is halted, hung up, or soft-off. In addition, if the controller detects that the firmware is corrupted or hung up, the controller may halt the processor while updating the firmware.
Abstract translation: 实施例包括监视计算系统以确定计算系统的固件是否已损坏,挂起或需要自动更新。 计算系统然后可以通过网络请求固件更新数据。 此外,计算系统可以包括具有确定固件是否被破坏或挂起的能力的控制器,并通过网络请求和接收固件更新数据。 此外,当固件被破坏或挂起,如果处理器被挂起,以及操作系统是否停止,挂断或软关闭时,控制器可能具有这种能力。 此外,如果控制器检测到固件已损坏或挂起,则控制器可能在更新固件时停止处理器。
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公开(公告)号:DE10392619B4
公开(公告)日:2008-10-16
申请号:DE10392619
申请日:2003-04-02
Applicant: INTEL CORP
Inventor: CUI YING , SAMSON ERIC , BERKOVITS ARIEL , NAVALE ADITYA , WYATT DAVID , CLINE LESLIE , TSANG JOSEPH , BLAKE MARK , POISNER DAVID , STEVENS WILLIAM JR , SAR-DESSAI VIJAY
Abstract: In one embodiment of the invention, an integrated device is described that employs a mechanism to control power consumption of a graphics memory controller hub (GMCH) through both voltage and frequency adjustment of clock signal received from a clock generator. The GMCH comprises a graphics core and a circuit to alter operational behavior, such as the frequency of a render clock signal supplied to the graphics core. The circuit is adapted to monitor idleness of the graphics core and reduce a frequency level of the render clock signal if the idleness exceeds a determined percentage of time.
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公开(公告)号:DE10392619T5
公开(公告)日:2005-08-04
申请号:DE10392619
申请日:2003-04-02
Applicant: INTEL CORP
Inventor: CUI YING , SAMSON ERIC , BERKOVITS ARIEL , NAVALE ADITYA , WYATT DAVID , CLINE LESLIE , TSANG JOSEPH , BLAKE MARK , POISNER DAVID , STEVENS WILLIAM JR , SAR-DESSAI VIJAY
Abstract: In one embodiment of the invention, an integrated device is described that employs a mechanism to control power consumption of a graphics memory controller hub (GMCH) through both voltage and frequency adjustment of clock signal received from a clock generator. The GMCH comprises a graphics core and a circuit to alter operational behavior, such as the frequency of a render clock signal supplied to the graphics core. The circuit is adapted to monitor idleness of the graphics core and reduce a frequency level of the render clock signal if the idleness exceeds a determined percentage of time.
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公开(公告)号:GB2405009B
公开(公告)日:2005-08-24
申请号:GB0424629
申请日:2003-04-02
Applicant: INTEL CORP
Inventor: CUI YING , SAMSON ERIC , BERKOVITS ARIEL , NAVALE ADITYA , WYATT DAVID , CLINE LESLIE E , TSANG JOSEPH , BLAKE MARK , POISNER DAVID , STEVENS WILLIAM JR , SAR-DESSAI VIJAY
Abstract: In one embodiment of the invention, an integrated device is described that employs a mechanism to control power consumption of a graphics memory controller hub (GMCH) through both voltage and frequency adjustment of clock signal received from a clock generator. The GMCH comprises a graphics core and a circuit to alter operational behavior, such as the frequency of a render clock signal supplied to the graphics core. The circuit is adapted to monitor idleness of the graphics core and reduce a frequency level of the render clock signal if the idleness exceeds a determined percentage of time.
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公开(公告)号:GB2405009A
公开(公告)日:2005-02-16
申请号:GB0424629
申请日:2003-04-02
Applicant: INTEL CORP
Inventor: CUI YING , SAMSON ERIC , BERKOVITS ARIEL , NAVALE ADITYA , WYATT DAVID , CLINE LESLIE E , TSANG JOSEPH , BLAKE MARK , POISNER DAVID , STEVENS WILLIAM JR , SAR-DESSAI VIJAY
Abstract: In one embodiment of the invention, an integrated device is described that employs a mechanism to control power consumption of a graphics memory controller hub (GMCH) (140) through both voltage and frequency adjustment of clock signal received from a clock generator (120). The GMCH (140) comprises a graphics core (200) and a circuit (235) to alter operational behavior, such as the frequency of a render clock signal (270) supplied to the graphics core (200). The circuit (235) is adapted to monitor idleness of the graphics core (200) and reduce a frequency level of the render clock (270) signal if the idleness exceeds a determined percentage of time.
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公开(公告)号:AU2003223464A1
公开(公告)日:2003-11-11
申请号:AU2003223464
申请日:2003-04-02
Applicant: INTEL CORP
Inventor: BERKOVITS ARIEL , NAVALE ADITYA , WYATT DAVID , CLINE LESLIE , TSANG JOSEPH , BLAKE MARK , POISNER DAVID , STEVENS WILLIAM JR , SAR-DESSAI VIJAY , CUI YING , SAMSON ERIC
Abstract: In one embodiment of the invention, an integrated device is described that employs a mechanism to control power consumption of a graphics memory controller hub (GMCH) through both voltage and frequency adjustment of clock signal received from a clock generator. The GMCH comprises a graphics core and a circuit to alter operational behavior, such as the frequency of a render clock signal supplied to the graphics core. The circuit is adapted to monitor idleness of the graphics core and reduce a frequency level of the render clock signal if the idleness exceeds a determined percentage of time.
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公开(公告)号:GB2432694B
公开(公告)日:2009-09-02
申请号:GB0704916
申请日:2005-09-29
Applicant: INTEL CORP
Inventor: KATARIA MUKESH , GAFKEN ANDREW H , STEVENS WILLIAM JR
IPC: G06F11/14
Abstract: Embodiments include monitoring a computing system to determine whether firmware of the computing system is corrupted, hung up, or requires automatic update. The computing system may then request firmware update data over a network. Moreover, the computing system may include a controller with capability to determine whether the firmware is corrupted or hung and request and receive firmware update data over a network. In addition, the controller may have the capability operate when the firmware is corrupted or hung up, if the processor is held up, and if the operating system is halted, hung up, or soft-off. In addition, if the controller detects that the firmware is corrupted or hung up, the controller may halt the processor while updating the firmware.
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公开(公告)号:GB2432694A
公开(公告)日:2007-05-30
申请号:GB0704916
申请日:2005-09-29
Applicant: INTEL CORP
Inventor: KATARIA MUKESH , GAFKEN ANDREW H , STEVENS WILLIAM JR
IPC: G06F11/14
Abstract: Embodiments include monitoring a computing system to determine whether firmware of the computing system is corrupted, hung up, or requires automatic update. The computing system may then request firmware update data over a network. Moreover, the computing system may include a controller with capability to determine whether the firmware is corrupted or hung and request and receive firmware update data over a network. In addition, the controller may have the capability operate when the firmware is corrupted or hung up, if the processor is held up, and if the operating system is halted, hung up, or soft-off. In addition, if the controller detects that the firmware is corrupted or hung up, the controller may halt the processor while updating the firmware.
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