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    ALIGNMENT OF INSPECTION TO DESIGN USING BUILT IN TARGETS
    1.
    发明专利
    ALIGNMENT OF INSPECTION TO DESIGN USING BUILT IN TARGETS 未知

    公开(公告)号：SG11201704452VA

    公开(公告)日：2017-07-28

    申请号：SG11201704452V

    申请日：2015-12-30

    Applicant: KLA TENCOR CORP

    Inventor： BHATTACHARYYA SANTOSH ,  BRAEUER BJOERN ,  GAO LISHENG

    IPC: G01R31/307 ,  G01R31/26 ,  G01R31/311 ,  H01L21/68

    Abstract: Methods and systems for determining a position of output generated by an inspection subsystem in design data space are provided. One method includes selecting one or more alignment targets from a design for a specimen. At least a portion of the one or more alignment targets include built in targets included in the design for a purpose other than alignment of inspection results to design data space. At least the portion of the one or more alignment targets does not include one or more individual device features. One or more images for the alignment target(s) and output generated by the inspection subsystem at the position(s) of the alignment target(s) may then be used to determine design data space positions of other output generated by the inspection subsystem in a variety of ways described herein.

    HIGH SENSITIVITY REPEATER DEFECT DETECTION
    2.
    发明专利
    HIGH SENSITIVITY REPEATER DEFECT DETECTION 未知

    公开(公告)号：SG11201903715XA

    公开(公告)日：2019-05-30

    申请号：SG11201903715X

    申请日：2017-11-08

    Applicant: KLA TENCOR CORP

    Inventor： BRAUER BJORN ,  BHATTACHARYYA SANTOSH ,  SHIFRIN EUGENE ,  LEE HUCHENG ,  MURRAY BENJAMIN ,  MATHEW ASHOK ,  BHASKAR CHETANA ,  GAO LISHENG

    IPC: G01N21/95 ,  G01N21/88

    Abstract: INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (19) World Intellectual Property 1#111011110111010101111101 11010011111111011110 HE 10111011111011110111111 Organization International Bureau (10) International Publication Number (43) International Publication Date .....0\"\" WO 2018/089459 Al 17 May 2018 (17.05.2018) WIPO I PCT (51) International Patent Classification: Santosh; 5540 Cooney Place, San Jose, California 95123 GO1N 21/95 (2006.01) GO1N 21/88 (2006.01) (US). SHIFRIN, Eugene; 463 Liquidambar Way, Sunny- vale, California 94086 (US). LEE, Hucheng; 1159 Kent- (21) International Application Number: wood Avenue, Cupertino, California 95014 (US). MUR- PCT/US2017/060589 RAY, Benjamin; 17261 NW LaPaloma Lane, Beaver- (22) International Filing Date: ton, California 97006 (US). MATHEW, Ashok; 34782 Si- 08 November 2017 (08.11.2017) ward Drive, Fremont, California 94539 (US). BHASKAR, (25) Filing Language: English Chetana; 1061 Queensbridge Court, San Jose, California 95120 (US). GAO, Lisheng; 21164 Toll Gate Road, Sarato- (26) Publication Language: English ga, California 95070 (US). (30) Priority Data: (74) Agent: MCANDREWS, Kevin et al.; KLA-Tencor Corp., 62/420,409 10 November 2016 (10.11.2016) US Legal Department, One Technology Drive, Milpitas, Cali- 62/443,810 09 January 2017 (09.01.2017) US fornia 95035 (US). 62/455,948 07 February 2017 (07.02.2017) US (81) Designated States (unless otherwise indicated, for every 15/804,980 06 November 2017 (06.11.2017) US kind of national protection available): AE, AG, AL, AM, (71) Applicant: KLA-TENCOR CORPORATION [US/US]; AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, Legal Department, One Technology Drive, Milpitas, Cali- CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, fornia 95035 (US). DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, (72) Inventors: BRAUER, Bjorn; 16698 NW Tucson Street, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, _ Beaverton, Oregon 97006 (US). BHATTACHARYYA, = = (54) Title: HIGH SENSITIVITY REPEATER DEFECT DETECTION = — = Computer subsystem(s) 300 _ _ = = = — = 28 26 24 20 16 18 2 1 ill. '' •• 34 /-10 I A os % 32 = , No = 14 30 = 22 = = Fig. 1 ,-, .. 11 (57) : Systems and methods for detecting defects on a reticle are provided. One system includes computer subsystem(s) that CN include one or more image processing components that acquire images generated by an inspection subsystem for a wafer, a main 7 1. user interface component that provides information generated for the wafer and the reticle to a user and receives instructions from the C:N user, and an interface component that provides an interface between the one or more image processing components and the main user °O interface. Unlike currently used systems, the one or more image processing components are configured for performing repeater defect 0 ---. detection by applying a repeater defect detection algorithm to the images acquired by the one or more image processing components, *1 : and the repeater defect detection algorithm is configured to detect defects on the wafer using a hot threshold and to identify the defects 11 c;;;; ) that are repeater defects. N O [Continued on next page] WO 2018/089459 Al MIDEDIMOMOIDEIREEMOOMMEIMOHNOCHINVOIMIE MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW. (84) Designated States (unless otherwise indicated, for every kind of regional protection available): ARIPO (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW), Eurasian (AM, AZ, BY, KG, KZ, RU, TJ, TM), European (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR), OAPI (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG). Published: — with international search report (Art. 21(3))

    DETERMINING DESIGN COORDINATES FOR WAFER DEFECTS
    3.
    发明申请
    DETERMINING DESIGN COORDINATES FOR WAFER DEFECTS 审中-公开
    确定缺陷的设计坐标

    公开(公告)号：WO2013040063A3

    公开(公告)日：2013-06-27

    申请号：PCT/US2012054904

    申请日：2012-09-12

    Applicant: KLA TENCOR CORP ,  CHANG ELLIS ,  VAN RIET MICHAEL ,  PARK ALLEN ,  ZAFAR KHURRAM ,  BHATTACHARYYA SANTOSH

    Inventor： CHANG ELLIS ,  VAN RIET MICHAEL ,  PARK ALLEN ,  ZAFAR KHURRAM ,  BHATTACHARYYA SANTOSH

    IPC: H01L21/66

    CPC classification number: G06T7/001 ,  G06T7/74 ,  G06T2207/30148

    Abstract: Methods and systems for determining design coordinates for defects detected on a wafer are provided. One method includes aligning a design for a wafer to defect review tool images for defects detected in multiple swaths on the wafer by an inspection tool, determining a position of each of the defects in design coordinates based on results of the aligning, separately determining a defect position offset for each of the multiple swaths based on the swath in which each of the defects was detected (swath correction factor), the design coordinates for each of the defects, and a position for each of the defects determined by the inspection tool, and determining design coordinates for the other defects detected in the multiple swaths by the inspection tool by applying the appropriate swath correction factor to those defects.

    Abstract translation: 提供了用于确定在晶片上检测到的缺陷的设计坐标的方法和系统。 一种方法包括对准晶片的设计以通过检查工具对晶片上的多个条带中检测到的缺陷来检查工具图像，基于对准的结果确定每个缺陷在设计坐标中的位置，分别确定缺陷 基于检测到每个缺陷的条带（条纹校正因子），每个缺陷的设计坐标以及由检查工具确定的每个缺陷的位置，针对每个多个条带的位置偏移，以及 通过对这些缺陷应用适当的条纹校正因子来确定检测工具在多个条中检测到的其他缺陷的设计坐标。

    SYSTEMS AND METHODS FOR DETECTING DEFECTS ON A WAFER AND GENERATING INSPECTION RESULTS FOR THE WAFER
    4.
    发明申请
    SYSTEMS AND METHODS FOR DETECTING DEFECTS ON A WAFER AND GENERATING INSPECTION RESULTS FOR THE WAFER 审中-公开
    用于检测波形缺陷和产生检测结果的系统和方法

    公开(公告)号：WO2009140403A3

    公开(公告)日：2010-02-25

    申请号：PCT/US2009043814

    申请日：2009-05-13

    Applicant: KLA TENCOR CORP ,  KULKARNI ASHOK ,  BHATTACHARYYA SANTOSH

    Inventor： KULKARNI ASHOK ,  BHATTACHARYYA SANTOSH

    IPC: H01L21/66

    CPC classification number: G05B19/41875 ,  G05B2219/37224 ,  G05B2219/45031 ,  H01L22/12 ,  H01L22/20 ,  H01L2924/0002 ,  Y02P90/22 ,  H01L2924/00

    Abstract: Systems and methods for detecting defects on a wafer and generating inspection results for the wafer are provided. One method includes detecting defects on a wafer by comparing output generated by scanning of the wafer performed by an inspection system to one or more defect detection thresholds. The method also includes sampling outliers in the output by selecting the output having the highest values from bins defined based on one or more predetermined criteria. In addition, the method includes selecting a portion of the sampled outliers based on wafer-level analysis of the sampled outliers. The method further includes generating inspection results for the wafer by combining information about the selected portion of the sampled outliers with information about the defects detected using the one or more defect detection thresholds.

    Abstract translation: 提供了用于检测晶片上的缺陷并产生晶片的检查结果的系统和方法。 一种方法包括通过将由检查系统执行的晶片的扫描产生的输出与一个或多个缺陷检测阈值进行比较来检测晶片上的缺陷。 该方法还包括通过从基于一个或多个预定标准定义的箱中选择具有最高值的输出来对输出中的异常值进行采样。 此外，该方法包括基于采样异常值的晶片级分析来选择一部分采样异常值。 该方法还包括通过将关于所选择的采样异常值的部分的信息与关于使用一个或多个缺陷检测阈值检测到的缺陷的信息组合来产生晶片的检查结果。

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