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    에지 배제 제어
    1.
    发明公开
    에지 배제 제어 审中-公开

    公开(公告)号：KR20200135554A

    公开(公告)日：2020-12-02

    申请号：KR20207033442

    申请日：2019-04-19

    Applicant: LAM RES CORP

    Inventor： CHANDRASHEKAR ANAND ,  LENZ ERIC H ,  KHO LEONARD WAI FUNG ,  CLEVENGER JEFFREY CHARLES ,  HA IN SU

    IPC: H01L21/687 ,  H01L21/02 ,  H01L21/67

    Abstract: 본명세서에제공된것들은반도체웨이퍼의에지영역에서프로세싱의균일성을제어하기위한방법들및 장치들이다. 일부실시예들에서, 방법들은에칭가스들및/또는억제가스들과같은처리가스들에에지영역을노출하는단계를포함한다. 또한본 명세서에제공된것들은웨이퍼의에지에서프로세싱분위기의제어를제공하도록구현될수도있는복수의링들을포함하는배제링 어셈블리들이다.

    HIGH STEP COVERAGE TUNGSTEN DEPOSITION
    3.
    发明专利
    HIGH STEP COVERAGE TUNGSTEN DEPOSITION 未知

    公开(公告)号：SG11202111277UA

    公开(公告)日：2021-11-29

    申请号：SG11202111277U

    申请日：2020-04-07

    Applicant: LAM RES CORP

    Inventor： BOWES MICHAEL ,  YANG TSUNG-HAN ,  CHANDRASHEKAR ANAND ,  ZHANG XING

    IPC: C23C16/455 ,  C23C16/04 ,  C23C16/14 ,  H01L21/768

    Abstract: Methods of depositing a tungsten nucleation layers that achieve very good step coverage are provided. The methods involve a sequence of alternating pulses of a tungsten-containing precursor and a boron-containing reducing agent, while co-flowing hydrogen (H2) with the boron-containing reducing agent. The H2 flow is stopped prior to the tungsten-containing precursor flow. By co-flowing H2 with the boron-containing reducing agent but not with the tungsten-containing precursor flow, a parasitic CVD component is reduced, resulting in a more self-limiting process. This in turn improves step coverage and conformality of the nucleation layer. Related apparatuses are also provided.

    TUNGSTEN FEATURE FILL WITH INHIBITION CONTROL
    4.
    发明专利
    TUNGSTEN FEATURE FILL WITH INHIBITION CONTROL 未知

    公开(公告)号：SG11202108725XA

    公开(公告)日：2021-09-29

    申请号：SG11202108725X

    申请日：2020-02-13

    Applicant: LAM RES CORP

    Inventor： YANG TSUNG-HAN ,  BOWES MICHAEL ,  LIU GANG ,  CHANDRASHEKAR ANAND

    IPC: H01L21/768 ,  H01L21/285

    Abstract: Systems and methods for selective inhibition control in semiconductor manufacturing are provided. An example method includes providing a substrate including a feature having one or more feature openings and a feature interior. A nucleation layer is formed on a surface of the feature interior. Based on a differential inhibition profile, a nonconformal bulk layer is selectively formed on a surface of the nucleation layer to leave a region of the nucleation layer covered, and a region of the nucleation layer uncovered by the nonconformal bulk layer. An inhibition layer is selectively formed on the covered and uncovered regions of the nucleation layer. Tungsten is deposited in the feature in accordance with the differential inhibition profile.

    METHODS AND APPARATUSES FOR VOID-FREE TUNGSTEN FILL IN THREE-DIMENSIONAL SEMICONDUCTOR FEATURES
    5.
    发明专利
    METHODS AND APPARATUSES FOR VOID-FREE TUNGSTEN FILL IN THREE-DIMENSIONAL SEMICONDUCTOR FEATURES 未知

    公开(公告)号：SG10201402625UA

    公开(公告)日：2014-12-30

    申请号：SG10201402625U

    申请日：2014-05-26

    Applicant: LAM RES CORP

    Inventor： CHANDRASHEKAR ANAND ,  GUHA JOYDEEP ,  HAMAYUN RAASHINA ,  XIANG HUA

    Abstract: METHODS AND APPARATUSES FOR VOID-FREE TUNGSTEN FILL IN THREE-DIMENSIONAL SEMICONDUCTOR Disclosed herein are methods of filling a 3-D structure of a semiconductor substrate with a tungsten-containing material. The 3-D structure may include sidewalls, a plurality of openings in the sidewalls leading to a plurality of features having a plurality of interior regions. The methods may include depositing a first layer of the tungsten-containing material within the 3-D structure such that the first layer partially fills a plurality of interior regions of the 3-D structure, etching vertically and horizontally after depositing the first layer, and depositing a second layer of the tungsten-containing material within the 3-D structure after the vertical and horizontal etching such that the second layer fills at least a portion of the interior regions left unfilled by the first layer. Also disclosed herein are apparatuses for filling a 3-D structure of a semiconductor substrate with a tungsten- containing material having a controller with instructions for etching vertically and horizontally. FIG. 4C 52

    VOID FREE LOW STRESS FILL
    6.
    发明专利
    VOID FREE LOW STRESS FILL 未知

    公开(公告)号：SG11202106002VA

    公开(公告)日：2021-07-29

    申请号：SG11202106002V

    申请日：2019-12-05

    Applicant: LAM RES CORP

    Inventor： CHANDRASHEKAR ANAND ,  YANG TSUNG-HAN

    IPC: C23C16/04 ,  C23C16/06 ,  C23C16/455 ,  C23C16/52 ,  H01L21/285 ,  H01L21/768 ,  H01L27/11524

    Abstract: Provided herein are methods of depositing low stress and void free metal films in deep features and related apparatus. Embodiments of the methods include treating the sidewalls of the holes to inhibit metal deposition while leaving the feature bottom untreated. In subsequent deposition operations, metal precursor molecules diffuse to the feature bottom for deposition. The process is repeated with subsequent inhibition operations treating the remaining exposed sidewalls. By repeating inhibition and deposition operations, high quality void free fill can be achieved. This allows high temperature, low stress deposition to be performed.

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