MANUFACTURE OF CAPACITOR FOR INTEGRATED CIRCUIT USING TANTALUM PENTAOXIDE LAYER

    公开(公告)号:JP2000208744A

    公开(公告)日:2000-07-28

    申请号:JP2000006224

    申请日:2000-01-12

    Inventor: ALERS GLENN B

    Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing a capacitor for integrated circuit using a tuntalum pentaoxide layer. SOLUTION: This method comprises the steps including a step 46 for forming a first metal electrode provided with a surface part made of metal nitride, a step 48 for forming a tantalum pentaoxide layer on the surface part while keeping a temperature lower than that of oxidizing the first metal electrode, a step 50 for annealing the tantalum pentaoxide layer through remote plasma, and a step 52 for forming a second electrode adjacent to the tantalum pentaoxide layer. These steps are preferably conducted while the tantalum pentaoxide is chemically vapor-deposited at about 500 deg.C or lower. Thus, the metal can be prevented from oxidization, and a high quality tantalum pentaoxide can be formed. The first metal electrode is made of at least one from among titanium, tungsten, tantalum, platinum, ruthenium, iridium, and their alloys.

    APPARATUS FOR PROCESSING SILICON WORK PIECE

    公开(公告)号:JP2000002597A

    公开(公告)日:2000-01-07

    申请号:JP13559999

    申请日:1999-05-17

    Abstract: PROBLEM TO BE SOLVED: To correctly control a temperature of a silicon work piece and correctly control a temperature-dependent process in a wide range of a process temperature by measuring the temperature on the basis of a spectral characteristic of a reflecting ultraviolet light. SOLUTION: A temperature-measuring apparatus 9 at an apparatus 39 for processing silicon work pieces is provided with a light source 11 such as a deuterium lamp or the like which irradiates ultraviolet light beams to a silicon surface 10a of a work piece 10 via a polarizer 13 such as a linear polarizer or the like, and a spectrum analysis apparatus 15 comprised of, e.g. a diffuse element 16 and a photodetector array 17. A beam 12 is irradiated to the silicon surface 10a by an angle of approximately 45-85 deg. and the reflecting light is spectrally analyzed after passing a polarizer 14 set at right angles to the polarizer 13. The obtained data is analyzed according to a predetermined system by a computer 44, whereby, for example, a temperature information for controlling a temperature-dependent process apparatus such as a vapor deposition apparatus 43, etc., with the use of a heating element 42 is provided.

    METHOD FOR PROCESSING SILICON WORK PIECE USING COMPOSITE TYPE OPTICAL TEMPERATURE MEASUREMENT SYSTEM

    公开(公告)号:JP2000356554A

    公开(公告)日:2000-12-26

    申请号:JP2000104530

    申请日:2000-04-06

    Abstract: PROBLEM TO BE SOLVED: To correctly measure the temperature of a silicon work piece where a process material is present in a wide range including a low temperature by spectrum analyzing ultraviolet beams reflected by the silicon work piece and converting the obtained spectrum data into a temperature value. SOLUTION: A light source 11 of the light reflection type thermometer radiates ultraviolet rays and visible light beams in a wavelength range of 250-550 nm. The radiated light beams and ultraviolet beam 12 through a polariscope 13. A surface 10A of the silicon work piece 10 is irradiated thereon with the beam with an angle of incidence ϕ(ϕ>45 deg.). The reflecting light beam 12 at the surface 10A is corrected by a polariscope 14, and spectrum analyzed by a spectrum analysis apparatus 15 having an optical grating diffusion element 16 and a silicon photo detector 17, so that spectrum data is obtained. The obtained spectrum data is converted into a temperature value. Information on the temperature value is sent to an electronic circuit or heating element, thereby controlling a temperature. The temperature of the silicon work piece 10 when a process material is applied or the like can be correctly measured accordingly.

    INTEGRATED CIRCUIT DEVICE PROVIDED WITH DUAL DAMASCENE CAPACITOR AND RELATED METHOD FOR MANUFACTURE

    公开(公告)号:JP2000208743A

    公开(公告)日:2000-07-28

    申请号:JP2000006223

    申请日:2000-01-12

    Abstract: PROBLEM TO BE SOLVED: To provide a high dielectric constant and quality with less insulation leakage so that reduction of an insulating layer by the metal of an electrode is prevented, by allowing a capacitor to comprise a substantially flat upper side surface, so formed as to be substantially the same plane as adjoining upper side surface part of an insulating layer. SOLUTION: An electrolytic capacitor 24 comprises a substantially flat upper side surface, so formed as to be substantially the same plane with the upper side surface part of an adjoining third insulating (dielectric) layer 42. The end of a lower side metal electrode 44 and that of a capacitor insulating (dielectric) layer 46 are terminated at the upper side surface of a capacitor. The capacitor insulating layer 46 has a permittivity almost equal to 25 or above which attains a desired capacitor characteristics. An upper side electrode comprises a conductive metal layer 48 and a conductive metal layer 50. The conductive metal layer 48 functions as a barrier layer as well, preventing a metal from the metal conductive layer 50, for example, copper from diffusing in the insulating layer 46.

    MANUFACTURE OF FIELD-EFFECT DEVICE AND CAPACITOR USING IMPROVED THIN FILM DIELECTRIC SUBSTANCE AND DEVICE OBTAINED THEREBY

    公开(公告)号:JP2000003885A

    公开(公告)日:2000-01-07

    申请号:JP10732999

    申请日:1999-04-15

    Inventor: ALERS GLENN B

    Abstract: PROBLEM TO BE SOLVED: To decrease the charge trapping density at the boundary surface of dielectric substance/silicon, by evaporating the thin film of high permittivity material on a silicon substrate, and forming the upper electrode after the structure is exposed to a plasma. SOLUTION: The substrate, which is exposed and has a silicon surface, is used. Then, a thin film 17, which has the thickness of the range of 2-10 nm and is the high permittivity material such as tantalum oxide or silicon nitride, is evaporated. The dielectric substance is directly evaporated on a silicon substrate 12 by performing chemical evaporation and the like. Then, the dielectric substance 17, which is evaporated for protecting the boundary surface of the dielectric substance/silicon and for decreasing leaking current, is exposed into plasma. In this case, the oxygen plasma having the air pressure of about 2 Torr and the substrate temperature of 100-400 deg.C protects the boundary surface, provides the stability and decreases the leaking current. Then, the surface of the dielectric substance 17 is nitrided as required, and an upper electrode 16 undergoes evaporation. This steps accompanies the evaporation of the upper electrode of polysilicon.

    INTEGRATED CIRCUIT AND METHOD THEREOF

    公开(公告)号:JP2000332221A

    公开(公告)日:2000-11-30

    申请号:JP2000137225

    申请日:2000-05-10

    Abstract: PROBLEM TO BE SOLVED: To easily conform to the standard/low temp. treating technology to improve the capacitance density and maintain a desired flatness by laying a dielectric material layer on lower electrodes and the surface of a dielectric layer and forming upper electrodes on the dielectric material layer. SOLUTION: Lower capacitor electrodes 102 are removed from the top surface of a dielectric 203 and also from a part of sidewalls. The etch back depth of the lower capacitor electrode 102 is on the order of 0.1 to 0.2 microns. A capacitor electrode layer 102 is removed, a dielectric material layer 405 for capacitors and upper electrodes 406 are deposited to complete forming of capacitors. Upper electrodes 406 of TiN or TaN on an oxide layer protect the oxide from Ti reducing the oxide layer and deteriorating dielectric characteristics. The tendency of short circuit esp. between the lower capacitor electrode 102 and the upper electrode 406 due to planarizing steps of chemical mechanical polishing is avoided by physically separating the two layers 102, 406.

    INTEGRATED CIRCUIT
    9.
    发明专利

    公开(公告)号:JP2000208741A

    公开(公告)日:2000-07-28

    申请号:JP2000002770

    申请日:2000-01-11

    Inventor: ALERS GLENN B

    Abstract: PROBLEM TO BE SOLVED: To easily cope with a standard process or low-temperature process and flattening technology for improved mounting density of capacitance by depositing a dielectrics layer in a cavity, with a conductive layer deposited over it functioning as an upper part plate. SOLUTION: A conductive plug 301 is formed of tungsten or other metal material, comprising a cavity 308 in it. The conductive plug 301 is conductive to a first metal layer 304 which is connected to a conductive bias 305. The conductive bias 305 eventually contacts to a source or drain of an FET. A capacitor comprises a side wall surface 309 of a cavity, a lower part surface 310 of it, and an upper part surface 300 of a plug. A high permittivity material layer 302 of the capacitor comprises an upper part plate 303.

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