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    PROCESS FOR PREPARING MULTILAYER PRINTED CIRCUIT BOARDS
    1.
    发明专利
    PROCESS FOR PREPARING MULTILAYER PRINTED CIRCUIT BOARDS 未知

    公开(公告)号：CA1262577A

    公开(公告)日：1989-10-31

    申请号：CA547294

    申请日：1987-09-18

    Applicant: MACDERMID INC

    Inventor： RUSZCZYK STANLEY J ,  LARSON GARY B ,  FERRIER DONALD R ,  GALLEGOS DANIEL ,  CASTALDI STEVEN A

    IPC: B05D3/04 ,  B05D3/10 ,  B05D5/12 ,  H05K1/00 ,  H05K3/18 ,  H05K3/46

    Abstract: PROCESS FOR PREPARING MULTILAYER PRINTED CIRCUIT BOARDS Multilayer printed circuit boards are fabricated by preparing a first layer in conventional manner by forming a resist image on a copper clad substrate, etching away unwanted copper, removing the resist from the circuit pattern and optionally applying a dielectric mask such as conventional solder mask to selected portions of the circuit pattern. A second layer, and optionally one or more subsequent layers, are fabricated by providing an image of a second circuit pattern in a predetermined location on said first layer, the image being formed using a suspension of cuprous oxide in a curable resin material. The image is cured at least partially and subjected to chemical reduction to convert at least a portion of the cuprous oxide to metallic copper. The image is then electrolessly plated with copper to build up the circuit pattern and the latter is selectively coated with a dielectric mask before repeating the cycle to build up one or more additional layers. Solder can be applied to selected areas of any of said printed circuit layers at any appropriate time during fabrication. The above method of fabrication has advantages of economy of time, materials and labor as compared with methods hitherto employed to prepare multilayer boards in which a plurality of single boards are fabricated individually and then assembled as a sandwich or laminate by application of heat and pressure.

    METHOD FOR MANUFACTURE OF PRINTED CIRCUIT BOARDS HAVING SOLDER-MASKED TRACES
    2.
    发明专利
    METHOD FOR MANUFACTURE OF PRINTED CIRCUIT BOARDS HAVING SOLDER-MASKED TRACES 未知

    公开(公告)号：CA1258138A

    公开(公告)日：1989-08-01

    申请号：CA515260

    申请日：1986-08-01

    Applicant: MACDERMID INC

    Inventor： LARSON GARY B ,  RUSZCZYK STANLEY J ,  CASTALDI STEVEN A

    IPC: H05K3/06 ,  H05K3/24 ,  H05K3/28 ,  H05K3/34 ,  H05K3/42 ,  G03C5/00

    Abstract: Printed circuit boards having solder coated pads and through-holes and bare copper traces protected by a directly applied solder mask or by a coating of nonreflowable metal and a solder mask thereover, are manufactured by a process which avoids the need for tin-lead stripping and the need for separate application and leveling of molten solder. In the preferred process, liquid resists are applied to circuit boards having tin-lead over copper plated holes and pads so as to define and etch protect bare copper traces of desired pattern circuitry (as well as other desired configurations). Copper areas other than those protected by the etch-resist and tin-lead plating are etched away, the etch-resist removed and solder mask applied over the bare copper traces or other desired bare copper areas or, alternatively, to bare copper first coated with a non-reflowable metal. The tin-lead plating is then preferably reflowed and solidified to provide the pads and through-holes with solder coating.

    PROCESS FOR PREPARING MULTILAYER PRINTED CIRCUIT BOARDS
    3.
    发明专利
    PROCESS FOR PREPARING MULTILAYER PRINTED CIRCUIT BOARDS 未知

    公开(公告)号：AU8102887A

    公开(公告)日：1988-06-01

    申请号：AU8102887

    申请日：1987-09-10

    Applicant: MACDERMID INC

    Inventor： RUSZCZYK STANLEY J ,  CASTALDI STEVEN A ,  GALLEGOS DANIEL ,  LARSON GARY B ,  FERRIER DONALD R

    IPC: B05D3/04 ,  B05D3/10 ,  B05D5/12 ,  H05K1/00 ,  H05K3/18 ,  H05K3/46

    Abstract: Multilayer printed circuit boards are fabricated by preparing a first layer in conventional manner by forming a resist image on a copper clad substrate, etching away unwanted copper, removing the resist from the circuit pattern and optionally applying a dielectric mask such as conventional solder mask to selected portions of the circuit pattern. A second layer, and optionally one or more subsequent layers, are fabricated by providing an image of a second circuit pattern in a predetermined location on said first layer, the image being formed using a suspension of cuprous oxide in a curable resin material. The image is cured at least partially and subjected to chemical reduction to convert at least a portion of the cuprous oxide to metallic copper such that the unreduced cuprous oxide in resin serves as a dielectric layer. The image is then electrolessly plated with copper to build up the circuit pattern and the latter is selectively coated with a dielectric mask before repeating the cycle to build up one or more additional layers. Solder can be applied to selected areas of any of said printed circuit layers at any appropriate time during fabrication. The above method of fabrication has advantages of economy of time, materials and labor as compared with methods hitherto employed to prepare multilayer boards in which a plurality of single boards are fabricated individually and then assembled as a sandwich or laminate by application of heat and pressure.

    DISPOSITIVO DE POSICIONAMIENTO DE ALAMBRE PARA UNA MAQUINA DE TERMINACION DE ALAMBRE.
    5.
    发明专利
    DISPOSITIVO DE POSICIONAMIENTO DE ALAMBRE PARA UNA MAQUINA DE TERMINACION DE ALAMBRE. 未知

    公开(公告)号：MX2010000837A

    公开(公告)日：2010-03-01

    申请号：MX2010000837

    申请日：2008-01-17

    Applicant: MACDERMID INC

    Inventor： FENG KESHENG ,  WANG MING DE ,  CASTALDI STEVEN A

    IPC: B32B15/04 ,  B05D3/10 ,  B05D5/02

    Abstract: Un dispositivo (134) de posicionamiento de alambre para una máquina de terminación, incluye un alojamiento (130) de soporte configurado para ser ubicado próximo a una zona de terminación de la máquina de terminación. Un mecanismo (134) de sujeción de alambre está acoplado al alojamiento (130) de soporte y define un eje de alineación de alambre. El mecanismo (134) de sujeción de alambre está configurado para sujetar un alambre (104) a lo largo del eje (136) de alineación de alambre. El mecanismo (134) de sujeción de alambre y el alambre (104) son movibles con respecto al alojamiento (130) de soporte a lo largo de una trayectoria de transferencia lineal que está orientada de manera transversal al eje (136) de alineación de alambre. Un actuador eléctrico (132) está montado en el alojamiento (130) de soporte y está unido al mecanismo (134) de sujeción de alambre. El actuador (132) impulsa el mecanismo (134) de sujeción de alambre a lo largo de la trayectoria de transferencia.

    PROCESS FOR CREATING A PATTERN ON A COPPER SURFACE
    6.
    发明申请
    PROCESS FOR CREATING A PATTERN ON A COPPER SURFACE 审中-公开
    在铜表面上形成图案的方法

    公开(公告)号：WO2007126516A3

    公开(公告)日：2008-01-10

    申请号：PCT/US2007005105

    申请日：2007-02-27

    Applicant: MACDERMID INC

    Inventor： SAWOSKA DAVID ,  KROL ANDREW M ,  CASTALDI STEVEN A

    IPC: B05D7/14 ,  B05D1/02 ,  H05K3/12

    CPC classification number: H05K3/061 ,  B41M5/0047 ,  B41M5/0058 ,  C23F1/18 ,  H05K3/383 ,  H05K2203/013 ,  H05K2203/1173

    Abstract: A process for printing inks or organic resists using a droplet discharge printing mechanism onto a copper or copper alloy surface with increased resolution is described. The increased resolution is achieved by first preferably microetching the surface and then treating the copper surface with an organic substance which is capable of lowering the surface energy of the copper surface or capable of making the copper surface more hydrophobic prior to printing thereon. The process is useful in the manufacture of electronic circuits.

    Abstract translation: 描述了使用液滴喷射印刷机构将印刷油墨或有机抗蚀剂印刷到铜或铜合金表面上的分辨率提高的方法。 通过首先优选对表面进行微蚀刻，然后用能够降低铜表面的能量或能够使铜表面在其上印刷之前更具疏水性的有机物质来处理铜表面来实现增加的分辨率。 该方法在电子电路的制造中是有用的。

    8.
    发明专利
    未知

    公开(公告)号：AT82529T

    公开(公告)日：1992-12-15

    申请号：AT87906862

    申请日：1987-09-10

    Applicant: MACDERMID INC

    Inventor： RUSZCZYK STANLEY J ,  FERRIER DONALD R ,  LARSON GARY B ,  GALLEGOS DANIEL ,  CASTALDI STEVEN A

    IPC: B05D3/04 ,  B05D3/10 ,  B05D5/12 ,  H05K1/00 ,  H05K3/18 ,  H05K3/46

    Abstract: Multilayer printed circuit boards are fabricated by preparing a first layer in conventional manner by forming a resist image on a copper clad substrate, etching away unwanted copper, removing the resist from the circuit pattern and optionally applying a dielectric mask such as conventional solder mask to selected portions of the circuit pattern. A second layer, and optionally one or more subsequent layers, are fabricated by providing an image of a second circuit pattern in a predetermined location on said first layer, the image being formed using a suspension of cuprous oxide in a curable resin material. The image is cured at least partially and subjected to chemical reduction to convert at least a portion of the cuprous oxide to metallic copper such that the unreduced cuprous oxide in resin serves as a dielectric layer. The image is then electrolessly plated with copper to build up the circuit pattern and the latter is selectively coated with a dielectric mask before repeating the cycle to build up one or more additional layers. Solder can be applied to selected areas of any of said printed circuit layers at any appropriate time during fabrication. The above method of fabrication has advantages of economy of time, materials and labor as compared with methods hitherto employed to prepare multilayer boards in which a plurality of single boards are fabricated individually and then assembled as a sandwich or laminate by application of heat and pressure.

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