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公开(公告)号：JP2003215550A
公开(公告)日：2003-07-30
申请号：JP2002015938
申请日：2002-01-24
Applicant: ST LCD KK
Inventor： KOMATSU HIROSHI , MATSUOKA HIROAKI , KAWABE MASAHIKO , TOMITA HIROSHI , MORITA TAKASHI
IPC: G02F1/13 , C03B33/09 , C03C17/34 , G02F1/1333 , G02F1/1345
Abstract: PROBLEM TO BE SOLVED: To provide a display device capable of preventing a short circuit from occurring in a metallic frame, and to provide a manufacturing method therefor. SOLUTION: A liquid crystal 24 is filled in a space formed between an active substrate 21 and a counter substrate 22. On the surface of an overcoat layer 29 of the counter substrate 22, an ITO film 12 is formed as a conductive film to be used as an electrode layer to the inside at predetermined intervals away from the circumferential parts of a glass substrate 27 and the overcoat layer 29. Even if burrs are produced on the glass substrate 27, the overcoat layer 29, or the like on the counter substrate 22 and come into contact with a metallic frame 32, the ITO film 12 as the electrode layer is not brought into direct contact with the metallic frame 32 and the short circuit is avoided. COPYRIGHT: (C)2003,JPO
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公开(公告)号：JP2003066397A
公开(公告)日：2003-03-05
申请号：JP2001253405
申请日：2001-08-23
Applicant: Sony Corp , St Lcd Kk , エスティ・エルシーディ株式会社 , ソニー株式会社
Inventor： FUKUNAGA YOKO , SUGANO YUKIYASU , KOMATSU HIROSHI , TAKAGI YASUSHI , SAKURAI MIKIO
Abstract: PROBLEM TO BE SOLVED: To prevent contamination of equipment in different manufacturing processes such as a conveyance carrier and a clean room by completely eliminating powered matters generated by chemical etching for the purpose of making a display panel thin.
SOLUTION: First, a display panel is produced by connecting a pair of substrates having a prescribed thickness with a prescribed gap between the substrates with the pair of the substrates overlapped. Next, the internal display panel is sealed hermetically along the outer circumferential parts of the both substrates by supplying a sealing material to the outer circumferential parts of the substrates. After that, the substrates are soaked in chemicals while protected with the sealing material, and the surfaces of the substrates are removed by a fixed quantity by chemical reaction to make the substrates thin. The sealing material is dried after washing the substrates, and powered matters generated by the chemical reaction are deposited at the outer circumferential parts of the substrates. The substrates are washed again to eliminate the powered matters and are then dried.
COPYRIGHT: (C)2003,JPOAbstract translation: 要解决的问题：为了防止通过完全消除化学蚀刻产生的动力，以便使显示面板变薄，从而防止不同制造工艺如输送载体和洁净室中的设备污染。 解决方案：首先，通过将具有规定厚度的一对基板与基板之间的规定间隙连接起来而重叠显示面板。 接下来，通过向基板的外周部分供给密封材料，使内部显示面板沿着两个基板的外周部密封。 之后，将基材浸渍在化学品中，同时用密封材料保护，并通过化学反应去除固定的基材表面，使基材变薄。 在清洗基板之后干燥密封材料，并且在基板的外周部分沉积由化学反应产生的动力物质。 再次洗涤底物以消除动力物质，然后干燥。
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Patent Agency Ranking
公开(公告)号：JP2003167249A
公开(公告)日：2003-06-13
申请号：JP2001368722
申请日：2001-12-03
Inventor： FUKUNAGA YOKO , KOMATSU HIROSHI , AIDA NOBUHIRO , MUNAKATA MASAKI
IPC: G02B5/08 , G02F1/1335
Abstract: PROBLEM TO BE SOLVED: To improve discoloration of a reflection film consisting of silver or an alloy containing silver and to enhance display quality. SOLUTION: In a manufacturing method for a liquid crystal display element 1 having a liquid crystal layer 16 between a pair of substrates 2 and 3 disposed opposite to each other and the reflection film 9 consisting of silver or the alloy containing silver and formed on one of the pair of substrates 2 and 3, after the reflection film is formed, the reflection film 9 is subjected to heat treatment and/or liquid chemical treatment with alkaline liquid chemical prior to the next stage. COPYRIGHT: (C)2003,JPO
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公开(公告)号：JP2003115594A
公开(公告)日：2003-04-18
申请号：JP2001310560
申请日：2001-10-05
Inventor： TANAKA TSUTOMU , MANO MICHIO , TORIYAMA SHIGETAKA , FUJINO MASAHIRO , KOMATSU HIROSHI , TAKEDA HIROHISA
IPC: G02F1/1368 , H01L21/302 , H01L21/304 , H01L21/3065 , H01L21/308 , H01L29/786
Abstract: PROBLEM TO BE SOLVED: To improve the yield of a product by preventing defects in gate breakdown strength in a bottom gate type TFT. SOLUTION: The manufacturing method of a bottom gate type TFT 100A includes a step (1) of forming a gate electrode on a substrate, a step (2) of forming a gate insulating film on the gate electrode 2, a step (3) of forming a laminate made up of an protective insulating film 8 having a film thickness of 100 nm or smaller while an active-layer antecedent film (polysilicon film 7) and the protective insulating film 8 are laminated on the gate insulating film, a step (4) of implanting a dopant in an LDD region or in a source/drain region of the active-layer precursor film 8 through the protective insulating film 8, a step (5) of activating the implanted dopant and causing the other non-dopant part to be an active layer, a step (6) of modifying the quality of all or part of the protective insulating film 8, a step (7) of forming an interlayer insulating film on the modified protective insulating film 8, and a step (8) of forming a source/drain electrode on the interlayer insulating film.
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公开(公告)号：JP2003234475A
公开(公告)日：2003-08-22
申请号：JP2002031867
申请日：2002-02-08
Inventor： TAKATOKU MASATO , KOMATSU HIROSHI , AIDA NOBUHIRO
IPC: G02F1/1368 , H01L21/336 , H01L29/786
Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device capable of preventing insulating destruction during manufacturing process of the semiconductor device having a thin film transistor, and improving yield. SOLUTION: In this method for manufacturing a semiconductor device by forming a conductive pattern 3 having a gate electrode 3a on an insulating substrate 1, laminating a semiconductor thin film layer 5 through an insulating film, and introducing impurity to the semiconductor thin film layer 5 by ion implantation from a mask pattern 26 covering the upper part of the gate electrode 3a, the upper part of the gate electrode 3a and the overlapped part of the conductive pattern 3, the semiconductor thin film layer 5, and the edge of the overlapped part are covered with a mask pattern 26, while an impurity introduction area in the semiconductor thin film layer 5 is exposed at the time of implantation ion. COPYRIGHT: (C)2003,JPO
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公开(公告)号：JP2003133560A
公开(公告)日：2003-05-09
申请号：JP2001331921
申请日：2001-10-30
Inventor： TAKATOKU MASATO , AIDA NOBUHIRO , KOMATSU HIROSHI
IPC: H01L21/66 , H01L21/20 , H01L21/336 , H01L29/786
Abstract: PROBLEM TO BE SOLVED: To surely obtain an evaluation result at the time of evaluating the crystal condition of a polysilicon film formed by a low temperature polycrystallization process. SOLUTION: After an amorphous silicon film 6a is formed on a substrate 2, the substrate 2 is cleaned in a cleaning process. In more practical, a pre- process to form a surface oxide layer 6s on the amorphous silicon film 6a with a solution including ozone and a post-process to remove the surface oxide layer 6s with a solution including fluoric acid are performed. Thereafter, an oxide film 6t is formed on the surface of the cleaned amorphous silicon film 6a. Next, a polysilicon film 6 which becomes the channel layer of a thin film transistor is formed by performing a laser annealing process to the amorphous silicon film 6a. In this case, the linearity and/or periodicity of the space structure of the film surface of the polysilicon film 6 is detected and the condition of the polysilicon film 6 is evaluated based on the detection result of the linearity and/or periodicity.
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7.发明专利
公开(公告)号：JP2001332738A
公开(公告)日：2001-11-30
申请号：JP2000152356
申请日：2000-05-24
Inventor： YAMAGISHI MACHIO , FUJINO MASAHIRO , KOMATSU HIROSHI , MUNAKATA MASAKI
IPC: G02F1/136 , G02F1/1368 , G09F9/30 , H01L21/336 , H01L27/32 , H01L29/786
Abstract: PROBLEM TO BE SOLVED: To prevent a point defect or a line defect of a thin film semiconductor device used for a display or the like. SOLUTION: In a thin film semiconductor device, a signal wiring 3, a gate wiring 2 and a thin film transistor TFT are formed on an insulating board to constitute a circuit. A semiconductor thin film 4 is extended along the signal wiring 3, and a distance from a contact hole CONS for electrically connecting the film 4 to the wiring 3 to a channel region Ch is lengthened. A protective member 2F of floating is arranged of the same material as that of a gate electrode along an edge of the film 4 disposed from the CONS to the channel region. The contact hole COND for connecting the drain region of the TFT to an intermediate wiring 3a and the contact hole CONP for connecting a pixel electrode to the wiring 3a are isolated from each other, and the former is arranged at a remote position from the TFT as compared with the latter. A part of the film 4 disposed under the wiring 3 via the CONS is extended at an outside in a width of at least 5 μm from an inner diameter of the CONS.
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