Abstract:
La présente invention propose un procédé de réalisation d'un film mince d'un premier matériau saillant perpendiculairement à une surface plane d'un support, comprenant :a) une formation, au-dessus du support, d'un bloc d'un deuxième matériau comprenant au moins une paroi perpendiculaire à ladite surface plane,b) une formation d'une couche mince du premier matériau sur ladite paroi, etc) un retrait d'au moins une portion dudit bloc de deuxième matériau de manière à former le film mince de premier matériau.
Abstract:
The method involves forming an intermediate semiconductor layer (6) above a substrate (2), where the layer contains an alloy of silicon and germanium. Source, drain and insulated gate regions (11,12,9) of a MOS transistor are formed above the semiconductor layer. The semiconductor layer is oxidized from a lower surface of the layer for increasing concentration of germanium in a channel of the transistor.
Abstract:
L'invention concerne un procédé de fabrication d'un transistor MOS comprenant :a) la formation, au-dessus d'un substrat 2, d'une couche semiconductrice intermédiaire 6 contenant un alliage de silicium et de germanium,b) la réalisation des régions 11, 12, 9 de source, de drain et de grille isolée du transistor, au-dessus de la couche intermédiaire 6,c) l'oxydation de la couche intermédiaire 6 à partir de sa surface inférieure de façon à augmenter la concentration de germanium dans le canal du transistor.
Abstract:
The microresonator has a resonant unit (160) made from monocrystalline silicon, and activation electrodes (120, 121) positioned close to the resonant unit. The unit (160) is placed in an opening in a semiconductor layer (110) that covers a substrate (100). The electrodes (120, 121) are formed in the layer and leveled with the opening. The unit (160) is in the shape of mushroom whose leg is fixed on the substrate. An independent claim is also included for a method of fabricating a microresonator.
Abstract:
L'invention concerne un microrésonateur comprenant un élément résonant (160) en silicium monocristallin et au moins une électrode d'activation (120, 121) placée à proximité de l'élément résonant, dans lequel l'élément résonant est placé dans une ouverture d'une couche semiconductrice (110) recouvrant un substrat (100), l'électrode d'activation étant formée dans la couche semiconductrice et affleurant au niveau de l'ouverture.
Abstract:
PROBLEM TO BE SOLVED: To provide a method of manufacturing a MOS transistor comprising a single crystal semiconductor film with no facets that is formed on a void portion, a laminated structure of single crystal thin films that prevents reduction in the device surface area, and a channel region that has a homogeneous thickness and is separated from an underlying semiconductor wafer by at least one non-single crystal layer with a homogeneous thickness. SOLUTION: A method of forming a single crystal semiconductor film portion separated from a substrate comprises: a step of growing a single crystal semiconductor sacrifice film 38 and a single crystal semiconductor film 40 on a single crystal semiconductor active region in an insulation region 34 by selective epitaxial growth; a step of at least partially removing the raised insulation region 34; a step of removing the single crystal semiconductor sacrifice film 38 from the side, leaving a void; and a step of filling the void with an insulator, an electrical conductor, or a heat conductor. COPYRIGHT: (C)2007,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide a manufacturing method for a transistor with a germanium-rich channel and fully-depleted type architecture that can be easily manufactured on an arbitrary substrate and that can easily control the formation of the channel. SOLUTION: The manufacturing method for a MOS transistor comprises (a) a step to form a half-conductive interlayer 6 containing alloy of silicon and germanium on a substrate 2, (b) step to manufacture the source region, drain region and insulating gate regions 11, 12 and 9 of the transistor on the interlayer 6, and (c) step to oxidize the interlayer 6 starting with the bottom surface of the interlayer 6 to raise the concentration of germanium within the channel of the transistor. COPYRIGHT: (C)2008,JPO&INPIT
Abstract:
Des portions monocristallines (2) à base de silicium sont réalisées sur une surface (S) d'un substrat (100), sélectivement dans des zones (101) où un matériau monocristallin est initialement découvert. Pour cela, une couche (1) est d'abord formée sur toute la surface du substrat, en utilisant un précurseur de silicium du type hydrure non-chloré, et dans des conditions adaptées de sorte que la couche est monocristalline dans les zones du substrat où un matériau monocristallin est initialement découvert, et amorphe en dehors de ces zones. Les portions amorphes de la couche (1) sont ensuite sélectivement gravées, de sorte que seules les portions monocristallines (2) de la couche restent sur le substrat.
Abstract:
L'invention concerne un procédé de formation d'une portion de couche semiconductrice monocristalline (40) au dessus d'une zone évidée, comprenant les étapes consistant à faire croître par épitaxie sélective sur une région active semiconductrice monocristalline (32) une couche semiconductrice monocristalline sacrificielle (38) et une couche semiconductrice monocristalline (40), et éliminer la couche sacrificielle (38). La croissance épitaxiale est réalisée alors que la région active est entourée d'une couche isolante en surépaisseur (34) et l'élimination de la couche semiconductrice monocristalline sacrificielle (38) est effectuée par un accès résultant d'une élimination au moins partielle de la couche isolante en surépaisseur.
Abstract:
The low temperature epitaxy process on a surface of plate containing pure silicon material/silicon alloy in rapid thermal chemical vapor deposition equipment to reduce creeping by diffusion of surface of the plate, comprises charging the plate in an equipment at 400-500[deg]C, and preparing a surface to deposit new chemical species. The deposition is carried out at low epitaxial temperature of less than 750[deg]C. Temperature in the chemical deposition equipment increases the charging temperature of the plate up to depositing temperature without extending. The low temperature epitaxy process on a surface of plate containing pure silicon material/silicon alloy in rapid thermal chemical vapor deposition equipment to reduce creeping by diffusion of surface of the plate, comprises charging the plate in an equipment at 400-500[deg]C, and preparing a surface to deposit new chemical species. The deposition is carried out at low epitaxial temperature of less than 750[deg]C. Temperature in the chemical deposition equipment increases the charging temperature of the plate up to depositing temperature without extending. The preparation of plate surface comprises a permanent passivation surface, which is carried out by injecting gas/mixture of active gases at 400-500[deg]C, pre cleaning surface of the plate, and eliminating oxides by a treatment with hydrofluoric acid. The gas/mixture of active gases comprises a gas containing hydrochloric acid, and silane or dichlorosilane. Desorption takes place during increase in the temperature. The gas/mixture of active gases are introduced by surface passivation is different from the gas/mixture of gases are injected for deposition. The dichlorosilane acts as active gas and silane as deposition gas. Precursor of active gas is silicon and the precursor of deposition gas is silicon and germanium. The gas/mixture active gases for passivation have slower depository kinetics than the kinetics of gas/mixture of gases for the deposition. The mixture of active gases is adjusted by an adjustor to obtain depository kinetics, which is almost zero. The injection of gas/mixture of active gases is carried out after charging the plate.