2.
    发明专利
    未知

    公开(公告)号:DE602007004139D1

    公开(公告)日:2010-02-25

    申请号:DE602007004139

    申请日:2007-03-16

    Abstract: The method involves forming an intermediate semiconductor layer (6) above a substrate (2), where the layer contains an alloy of silicon and germanium. Source, drain and insulated gate regions (11,12,9) of a MOS transistor are formed above the semiconductor layer. The semiconductor layer is oxidized from a lower surface of the layer for increasing concentration of germanium in a channel of the transistor.

    Formation of single crystal semiconductor film portion separated from substrate
    6.
    发明专利
    Formation of single crystal semiconductor film portion separated from substrate 审中-公开
    形成从衬底分离的单晶半导体膜部分

    公开(公告)号:JP2007243174A

    公开(公告)日:2007-09-20

    申请号:JP2007032606

    申请日:2007-02-13

    Abstract: PROBLEM TO BE SOLVED: To provide a method of manufacturing a MOS transistor comprising a single crystal semiconductor film with no facets that is formed on a void portion, a laminated structure of single crystal thin films that prevents reduction in the device surface area, and a channel region that has a homogeneous thickness and is separated from an underlying semiconductor wafer by at least one non-single crystal layer with a homogeneous thickness.
    SOLUTION: A method of forming a single crystal semiconductor film portion separated from a substrate comprises: a step of growing a single crystal semiconductor sacrifice film 38 and a single crystal semiconductor film 40 on a single crystal semiconductor active region in an insulation region 34 by selective epitaxial growth; a step of at least partially removing the raised insulation region 34; a step of removing the single crystal semiconductor sacrifice film 38 from the side, leaving a void; and a step of filling the void with an insulator, an electrical conductor, or a heat conductor.
    COPYRIGHT: (C)2007,JPO&INPIT

    Abstract translation: 要解决的问题:为了提供一种制造包括单晶半导体膜的MOS晶体管的方法,所述单晶半导体膜没有形成在空隙部分上的小面,单晶薄膜的层压结构防止器件表面积的降低 以及具有均匀厚度并且通过至少一个均匀厚度的非单晶层与下面的半导体晶片分离的沟道区域。 解决方案:形成从衬底分离的单晶半导体膜部分的方法包括:在绝缘区域的单晶半导体有源区上生长单晶半导体牺牲膜38和单晶半导体膜40的步骤 34通过选择性外延生长; 至少部分去除凸起绝缘区域34的步骤; 从侧面去除单晶半导体牺牲膜38留下空隙的步骤; 以及用绝缘体,电导体或导热体填充空隙的步骤。 版权所有(C)2007,JPO&INPIT

    PROCEDE DE FORMATION D'UNE PORTION MONOCRISTALLINE A BASE DE SILICIUM

    公开(公告)号:FR2900277A1

    公开(公告)日:2007-10-26

    申请号:FR0603453

    申请日:2006-04-19

    Abstract: Des portions monocristallines (2) à base de silicium sont réalisées sur une surface (S) d'un substrat (100), sélectivement dans des zones (101) où un matériau monocristallin est initialement découvert. Pour cela, une couche (1) est d'abord formée sur toute la surface du substrat, en utilisant un précurseur de silicium du type hydrure non-chloré, et dans des conditions adaptées de sorte que la couche est monocristalline dans les zones du substrat où un matériau monocristallin est initialement découvert, et amorphe en dehors de ces zones. Les portions amorphes de la couche (1) sont ensuite sélectivement gravées, de sorte que seules les portions monocristallines (2) de la couche restent sur le substrat.

    FORMATION D'UNE PORTION DE COUCHE SEMICONDUCTRICE MONOCRISTALLINE SEPAREE D'UN SUBSTRAT

    公开(公告)号:FR2897471A1

    公开(公告)日:2007-08-17

    申请号:FR0650474

    申请日:2006-02-10

    Abstract: L'invention concerne un procédé de formation d'une portion de couche semiconductrice monocristalline (40) au dessus d'une zone évidée, comprenant les étapes consistant à faire croître par épitaxie sélective sur une région active semiconductrice monocristalline (32) une couche semiconductrice monocristalline sacrificielle (38) et une couche semiconductrice monocristalline (40), et éliminer la couche sacrificielle (38). La croissance épitaxiale est réalisée alors que la région active est entourée d'une couche isolante en surépaisseur (34) et l'élimination de la couche semiconductrice monocristalline sacrificielle (38) est effectuée par un accès résultant d'une élimination au moins partielle de la couche isolante en surépaisseur.

    10.
    发明专利
    未知

    公开(公告)号:FR2890662B1

    公开(公告)日:2008-09-19

    申请号:FR0509397

    申请日:2005-09-14

    Abstract: The low temperature epitaxy process on a surface of plate containing pure silicon material/silicon alloy in rapid thermal chemical vapor deposition equipment to reduce creeping by diffusion of surface of the plate, comprises charging the plate in an equipment at 400-500[deg]C, and preparing a surface to deposit new chemical species. The deposition is carried out at low epitaxial temperature of less than 750[deg]C. Temperature in the chemical deposition equipment increases the charging temperature of the plate up to depositing temperature without extending. The low temperature epitaxy process on a surface of plate containing pure silicon material/silicon alloy in rapid thermal chemical vapor deposition equipment to reduce creeping by diffusion of surface of the plate, comprises charging the plate in an equipment at 400-500[deg]C, and preparing a surface to deposit new chemical species. The deposition is carried out at low epitaxial temperature of less than 750[deg]C. Temperature in the chemical deposition equipment increases the charging temperature of the plate up to depositing temperature without extending. The preparation of plate surface comprises a permanent passivation surface, which is carried out by injecting gas/mixture of active gases at 400-500[deg]C, pre cleaning surface of the plate, and eliminating oxides by a treatment with hydrofluoric acid. The gas/mixture of active gases comprises a gas containing hydrochloric acid, and silane or dichlorosilane. Desorption takes place during increase in the temperature. The gas/mixture of active gases are introduced by surface passivation is different from the gas/mixture of gases are injected for deposition. The dichlorosilane acts as active gas and silane as deposition gas. Precursor of active gas is silicon and the precursor of deposition gas is silicon and germanium. The gas/mixture active gases for passivation have slower depository kinetics than the kinetics of gas/mixture of gases for the deposition. The mixture of active gases is adjusted by an adjustor to obtain depository kinetics, which is almost zero. The injection of gas/mixture of active gases is carried out after charging the plate.

Patent Agency Ranking