3.
    发明专利
    未知

    公开(公告)号:DE602007004139D1

    公开(公告)日:2010-02-25

    申请号:DE602007004139

    申请日:2007-03-16

    Abstract: The method involves forming an intermediate semiconductor layer (6) above a substrate (2), where the layer contains an alloy of silicon and germanium. Source, drain and insulated gate regions (11,12,9) of a MOS transistor are formed above the semiconductor layer. The semiconductor layer is oxidized from a lower surface of the layer for increasing concentration of germanium in a channel of the transistor.

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