3.
    发明专利
    未知

    公开(公告)号:FR2845201B1

    公开(公告)日:2005-08-05

    申请号:FR0211989

    申请日:2002-09-27

    Abstract: The formation of a portion of a composite material from the elements of an initial material and a metal at the heart of an electronic circuit, comprises: (a) formation of a cavity (C) incorporating at least one opening (O) towards an access surface and presenting an internal wall having a zone of an initial material; (b) deposition of a metal (6) in the proximity of this zone of initial material; (c) heating of the circuit to form a portion of composite material (26) in the zone of initial material; (d) withdrawing from the cavity, via the opening, at least one portion of the metal not having formed the composite material. Independent claims are also included for: (a) an electronic circuit incorporating a portion of composite material formed by this method and acting as an electrical connection; (b) a MOS transistor incorporating a gate having a portion of composite material formed by this method.

    4.
    发明专利
    未知

    公开(公告)号:FR2856843A1

    公开(公告)日:2004-12-31

    申请号:FR0307690

    申请日:2003-06-25

    Abstract: Protection of a semiconductor material against the formation of a metal silicide comprises the formation, on the material, of a layer of silicon-germanium alloy using the following stages: (a) deposition of the layer of silicon-germanium alloy (10) on the integrated circuit assembly; (b) removal of this layer in the zones needed for the formation of a silicide; (c) deposition of a metal on the structure obtained by the removal; (d) formation of the metal silicide (110) on the defined zones; (e) removal of the metal which has not reacted and of the ternary metal-silicon-germanium alloy possibly formed; (f) removal of the layer of silicon-germanium alloy in order to expose the non silicide component.

    6.
    发明专利
    未知

    公开(公告)号:FR2856514A1

    公开(公告)日:2004-12-24

    申请号:FR0307474

    申请日:2003-06-20

    Abstract: The selective formation of silicide on a wafer (1) of semiconductor material including some zones exposed to the formation of silicide and some zones exposed to not forming silicide, comprises: (a) formation of a layer of resin over the zones not to form silicide; (b) implantation of ions across the layer of resin; (c) removal of the layer of resin; (d) deposition of a metal layer (30) on the wafer, the metal being able to form a silicide by thermal reaction with silicon; (e) thermal treatment to provoke the formation of silicide with the metal; and (f) removal of the metal that has not reacted during the thermal treatment. An independent claim is also included for a semiconductor device produced by the above process.

Patent Agency Ranking