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    VOLTAGE ADJUSTING CIRCUIT
    1.
    发明专利
    VOLTAGE ADJUSTING CIRCUIT 失效

    公开(公告)号：JP2001042955A

    公开(公告)日：2001-02-16

    申请号：JP2000199353

    申请日：2000-06-30

    Applicant: ST MICROELECTRONICS SRL

    Inventor： KHOURI OSAMA ,  MICHELONI RINO ,  MOTTA ILARIA ,  TORELLI GUIDO

    IPC: G05F1/56 ,  G05F3/24

    Abstract: PROBLEM TO BE SOLVED: To obtain a stable voltage adjusting circuit simple in configuration. SOLUTION: This circuit is equipped with voltage dividers R1 and R2 which are connected between 1st and 2nd output terminals VDD of a source voltage generator and GND, have input terminals IN and output terminals OUT, and are connected between an output node connected to the output terminals OUT and 2nd terminals GND and an operational amplifier OP which has an inverted input terminal connected to the input terminals, an uninverted input terminal connected to an intermediate node of the voltage dividers, and an output terminal for driving a 1st field effect transistor MPU between the output node and 1st terminals; and the output terminal of the operational amplifier is connected to the output node through a compensating network COMP, and a 2nd field effect transistor MPD which is connected between the output node and the 2nd terminals and has a control terminal is provided and has its gate terminal connected to a constant-voltage generating circuit.

    2.
    发明专利
    未知

    公开(公告)号：DE69935919D1

    公开(公告)日：2007-06-06

    申请号：DE69935919

    申请日：1999-12-30

    Applicant: ST MICROELECTRONICS SRL

    Inventor： ZAMMATTIO MATTEO ,  MOTTA ILARIA ,  MICHELONI RINO ,  GOLLA CARLA

    IPC: G11C16/30 ,  G11C5/14

    Abstract: A voltage boost device includes a first boost stage (4) and a second boost stage (5) connected to an input terminal and to an output terminal (10), the output terminal (10) supplying an output voltage higher than a supply voltage. The input terminal receives an operating condition signal (SB) having a first logic level representative of a standby operating state and a second logic level representative of an active operation state. The first boost stage (4) is enabled in presence of the second logic level of the operating condition signal (SB), and is disabled in presence of the first logic level of the operating condition signal (SB); the second boost stage (5) is controlled in a first operating condition in presence of the first logic level of the operating condition signal (SB), and is controlled in a second operating condition in presence of the second logic level of the operating condition signal (SB).

    3.
    发明专利
    未知

    公开(公告)号：ITMI20021486D0

    公开(公告)日：2002-07-05

    申请号：ITMI20021486

    申请日：2002-07-05

    Applicant: ST MICROELECTRONICS SRL

    Inventor： MICHELONI RINO ,  MOTTA ILARIA ,  CAPOVILLA MARCO

    IPC: G11C5/14 ,  G11C8/08 ,  G11C16/12

    Abstract: Voltage booster device (3) such as to selectively assume an active status and a stand-by status, said device comprising: a first terminal (15) such as to assume a respective electric potential and associated to a first capacitor (16), a second terminal (10) associated to a second capacitor (11) and selectively connectable to the first terminal (15), characterised in that it also comprises circuital means (100) for discharging the first capacitor thus reducing in module the electrical potential of the first terminal (15), the circuital means being activated to functioning when said device in the stand-by status and the second terminal (10) is disconnected from said first terminal (15).

    7.
    发明专利
    未知

    公开(公告)号：IT1316002B1

    公开(公告)日：2003-03-26

    申请号：ITRM20000577

    申请日：2000-11-08

    Applicant: ST MICROELECTRONICS SRL

    Inventor： KHOURI OSAMA ,  MOTTA ILARIA ,  MICHELONI RINO ,  TORELLI GUIDO

    IPC: G05F1/56

    Abstract: A voltage regulator having a comparator with an output terminal that is the output of the regulator, terminals for connection to a voltage supply, a source of a reference voltage connected to an input terminal of the comparator, and a feedback circuit connected between the output terminal and the other input terminal of the comparator. To prevent transients upon the transition from the standby state to the active state, there is provided a second reference-voltage source that provides a reference voltage substantially equal to that of the first source, a switch for connecting the second source to the other input terminal of the comparator, and a control circuit that can activate the supply of the regulator and can close the switch for a predetermined period of time when the supply of the regulator is activated.

    8.
    发明专利
    未知

    公开(公告)号：ITMI20021486A1

    公开(公告)日：2004-01-05

    申请号：ITMI20021486

    申请日：2002-07-05

    Applicant: ST MICROELECTRONICS SRL

    Inventor： MICHELONI RINO ,  MOTTA ILARIA ,  CAPOVILLA MARCO

    IPC: G11C5/14 ,  G11C8/08 ,  G11C16/12

    Abstract: Voltage booster device (3) such as to selectively assume an active status and a stand-by status, said device comprising: a first terminal (15) such as to assume a respective electric potential and associated to a first capacitor (16), a second terminal (10) associated to a second capacitor (11) and selectively connectable to the first terminal (15), characterised in that it also comprises circuital means (100) for discharging the first capacitor thus reducing in module the electrical potential of the first terminal (15), the circuital means being activated to functioning when said device in the stand-by status and the second terminal (10) is disconnected from said first terminal (15).

    10.
    发明专利
    未知

    公开(公告)号：DE60305104D1

    公开(公告)日：2006-06-14

    申请号：DE60305104

    申请日：2003-07-04

    Applicant: ST MICROELECTRONICS SRL

    Inventor： MICHELONI RINO ,  MOTTA ILARIA ,  CAPOVILLA MARCO

    IPC: G11C5/14 ,  G11C7/12 ,  G11C8/08 ,  G11C16/12

    Abstract: Voltage booster device (3) such as to selectively assume an active status and a stand-by status, said device comprising: a first terminal (15) such as to assume a respective electric potential and associated to a first capacitor (16), a second terminal (10) associated to a second capacitor (11) and selectively connectable to the first terminal (15), characterised in that it also comprises circuital means (100) for discharging the first capacitor thus reducing in module the electrical potential of the first terminal (15), the circuital means being activated to functioning when said device in the stand-by status and the second terminal (10) is disconnected from said first terminal (15).

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