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5 records (took 0.045 seconds)

    1.
    发明专利
    未知

    公开(公告)号：IT1318158B1

    公开(公告)日：2003-07-23

    申请号：ITMI20001585

    申请日：2000-07-13

    Applicant: ST MICROELECTRONICS SRL

    Inventor： KHOURI OSAMA ,  PIERIN ANDREA ,  MICHELONI RINO ,  GREGORI STEFANO ,  TORELLI GUIDONO ,  SANGALLI MIRIAM

    IPC: G11C16/08

    Abstract: A circuit device for performing hierarchic row decoding in semiconductor memory devices of the non-volatile type, which memory devices include an array of memory cells with column-ordered sectors, wherein each sector has a respective group of local wordlines linked to a main wordline. The circuit device includes a main wordline driver provided at each main wordline, and a local decoder provided at each local wordline. This circuit device further comprises, for each main wordline, a dedicated path connected between the main wordline and the local decoders of the associated local wordlines and connected to an external terminal arranged to receive a read/program voltage, the dedicated path enabling transfer of the read/program voltage to the local decoders.

    3.
    发明专利
    未知

    公开(公告)号：ITMI20001585D0

    公开(公告)日：2000-07-13

    申请号：ITMI20001585

    申请日：2000-07-13

    Applicant: ST MICROELECTRONICS SRL

    Inventor： KHOURI OSAMA ,  TORELLI GUIDO ,  MICHELONI RINO ,  PIERIN ANDREA ,  GREGORI STEFANO ,  SANGALLI MIRIAM

    IPC: G11C16/08

    Abstract: A circuit device for performing hierarchic row decoding in semiconductor memory devices of the non-volatile type, which memory devices include an array of memory cells with column-ordered sectors, wherein each sector has a respective group of local wordlines linked to a main wordline. The circuit device includes a main wordline driver provided at each main wordline, and a local decoder provided at each local wordline. This circuit device further comprises, for each main wordline, a dedicated path connected between the main wordline and the local decoders of the associated local wordlines and connected to an external terminal arranged to receive a read/program voltage, the dedicated path enabling transfer of the read/program voltage to the local decoders.

    4.
    发明专利
    未知

    公开(公告)号：DE602005008396D1

    公开(公告)日：2008-09-04

    申请号：DE602005008396

    申请日：2005-05-20

    Applicant: ST MICROELECTRONICS SRL ,  HYNIX SEMICONDUCTOR INC

    Inventor： RAGONE GIANCARLO ,  CRIPPA LUCA ,  SANGALLI MIRIAM ,  MICHELONI RINO

    IPC: G11C8/08 ,  G11C16/08 ,  H02M3/07 ,  H03K17/06

    Abstract: A high-voltage switch (24) has a high-voltage input terminal (29), receiving a high voltage (HV), and an output terminal (31). A pass transistor (36), having a control terminal, is connected between the high-voltage input terminal (29) and the output terminal (31). The output of a voltage-multiplying circuit (40) of the charge-pump type is connected to the control terminal. The voltage-multiplying circuit (40) is of a symmetrical type, has first and second charge-storage means (41, 42), receiving a clock signal (CK) of a periodic type, and has a first circuit branch (44, 48) and a second circuit branch (45, 49), which are symmetrical to one another and operate in phase opposition with respect to the clock signal (CK).

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