A non-volatile memory device supporting high-parallelism test at wafer level
    1.
    发明公开
    A non-volatile memory device supporting high-parallelism test at wafer level 有权
    EinnichtflüchtigerSpeicher mitUnterstützungvon hochparallelem Test auf Waferebene

    公开(公告)号:EP1672647A1

    公开(公告)日:2006-06-21

    申请号:EP04106609.3

    申请日:2004-12-15

    Abstract: A non-volatile memory device (100) is proposed. The non-volatile memory device includes a chip (105) of semiconductor material. The chip includes a memory (202) and control means (204,210,214) for performing a programming operation (314), an erasing operation (312) and a reading operation (316) on the memory in response to corresponding external commands. The chip further includes testing means (118, 120, 220, 225, 230) for performing at least one test process including the repetition of at least one of said operations by the control means, and a single access element (118) for enabling the testing means.

    Abstract translation: 提出了一种非易失性存储器件(100)。 非易失性存储器件包括半导体材料的芯片(105)。 芯片包括用于响应于相应的外部命令在存储器上执行编程操作(314),擦除操作(312)和读取操作(316)的存储器(202)和控制装置(204,210,214)。 所述芯片还包括用于执行至少一个测试过程的测试装置(118,120,220,225,230),所述测试装置包括由所述控制装置重复所述操作中的至少一个操作;以及单个访问元件(118) 测试手段。

Patent Agency Ranking