Abstract:
A first microelectronic element such as a semiconductor chip is mounted to a circuit board using an adaptor which has a region extending beneath the first microelectronic element and an additional region which may be folded over the first microelectronic element or which may project laterally from the first microelectronic element. The adaptor includes a functional element in the additional region, such as a further microelectronic element or an array of terminals for mounting another element. The assembly provides the benefits of a stacked chip assembly or other mustachio module, but can be made without the need for a special prepackaged stacked chip assembly. The adaptor can be configured so that it does not materially increase the height of the first microelectronic element above the circuit board.
Abstract:
An ultra thin system-in-a-package (SIP) with independent test and repair capability comprises an interposer having arranged on a top surface and a bottom surface thereof a number of packaged semiconductor chips mounted via solder bumps in accordance with a Land Grid Array (LGA) format and wherein no underfill is used on the SIP.
Abstract:
An ultra thin system-in-a-package (SIP) with independent test and repair capability comprises an interposer having arranged on a top surface and a bottom surface thereof a number of packaged semiconductor chips mounted via solder bumps in accordance with a Land Grid Array (LGA) format and wherein no underfill is used on the SIP.
Abstract:
An ultra thin system-in-a-package (SIP) with independent test and repair capability comprises an interposer (350) having arranged on a top surface (351) and a bottom surface (352) thereof a number of packaged semiconductor chips (315, 320, 325, 330) mounted via solder bumps (335) in accordance with a Land Grid Array (LGA) format and wherein no underfill is used on the SIP.
Abstract:
A microelectronic assembly (100) includes a semiconductor chip (110) having chip contacts (112) exposed at a first face and a substrate (130) juxtaposed with a face (128) of the chip (110). A conductive bond element (144) can electrically connect a first chip contact (112) with a first substrate contact (132) of the substrate, and a second conductive bond element (146) can electrically connect the first chip contact (112) with a second substrate contact. The first bond element (144) can have a first end (144A) metallurgically joined to the first chip contact (112) and a second end (144B) metallurgically joined to the first substrate contact (132). A first end (246A, 346A) of the second bond element (146) can be metallurgically joined to the first bond element (144).
Abstract:
A microelectronic package (20) includes a microelectronic element (22) having faces and contacts (26), a flexible substrate (30) overlying and spaced from a first face (24) of the microelectronic element (22), and a plurality of conductive terminals (42) exposed at a surface of the flexible substrate. The conductive terminals (42) are electrically interconnected with the microelectronic element (22) and the flexible substrate (30) includes a gap (50) extending at least partially around at least one of the conductive terminals (42). In certain embodiments, the package includes a support layer, such as a compliant layer (48), disposed between the first face (24) of the microelectronic element (22) and the flexible substrate (30). In other embodiments, the support layer includes at least one opening that is at least partially aligned with one of the conductive terminals.
Abstract:
An ultra thin system-in-a-package (SIP) with independent test and repair capability comprises an interposer (350) having arranged on a top surface (351) and a bottom surface (352) thereof a number of packaged semiconductor chips (315, 320, 325, 330) mounted via solder bumps (335) in accordance with a Land Grid Array (LGA) format and wherein no underfill is used on the SIP.