公开(公告)号：US4350976A

公开(公告)日：1982-09-21

申请号：US215134

申请日：1980-12-10

Applicant: Roger Benoit-Gonin ,  Jean L. Berger ,  Jean L. Coutures

Inventor： Roger Benoit-Gonin ,  Jean L. Berger ,  Jean L. Coutures

IPC: H03M1/66 ,  H03M1/00 ,  H03K13/02

CPC classification number: H03M1/00 ,  H03M2201/02 ,  H03M2201/2241 ,  H03M2201/2266 ,  H03M2201/2291 ,  H03M2201/3105 ,  H03M2201/3178 ,  H03M2201/4135 ,  H03M2201/4212 ,  H03M2201/4233 ,  H03M2201/4262 ,  H03M2201/81 ,  H03M2201/8128 ,  H03M2201/814 ,  H03M2201/837

Abstract: Successive two-trip traversals of charges between gates G.sub.0 and G.sub.2 make it possible to obtain beneath gates G.sub.1 and G.sub.2 quantities of charges equal to Q.sub.R, Q.sub.R /2, Q.sub.R /2.sup.2 . . . Q.sub.R /2.sup.i. A readout device for reading charges and connected to gates G.sub.2 and G.sub.4 generates voltages V.sub.R and V.sub.Ri =a.sub.0 .multidot.V.sub.R +a.sub.1 .multidot.V.sub.R /2+ . . . +a.sub.i-1 .multidot.V.sub.R /2.sup.i-1 +V.sub.R /2.sup.i which are compared with a voltage sample V.sub.x to be coded in order to determine by successive approximations the coefficients a.sub.0 . . . a.sub.n which are equal to 0 or to 1 such that V.sub.x =a.sub.0 .multidot.V.sub.R +a.sub.1 .multidot.V.sub.R /2+ . . . +a.sub.n .multidot.V.sub.R /2.sup.n. Depending on the value of a.sub.i, each quantity of charges Q.sub.R /2.sup.i stored beneath gate G.sub.1 is removed beneath diode D.sub.e or stored beneath gate G.sub.3 and then transferred beneath gate G.sub.4.

Abstract translation: 栅极G0和G2之间的电荷的连续两次跳变使得可以获得栅极G1和G2之下的等于QR，QR / 2，QR / 22的电荷量。 。 。 QR / 2i 用于读取电荷并连接到门G2和G4的读出装置产生电压VR和VRi = a0xVR + a1xVR / 2 +。 。 。 + ai-1xVR / 2i-1 + VR / 2i，其与要编码的电压采样Vx进行比较，以便通过逐次逼近来确定系数a0。 。 。 a等于0或1，使得Vx = a0xVR + a1xVR / 2 +。 。 。 + anxVR / 2n。 根据ai的值，存储在栅极G1下方的每个电荷量QR / 2i在二极管De下方被去除或存储在栅极G3下方，然后在栅极G4下方传送。

公开(公告)号：KR1020080004807A

公开(公告)日：2008-01-10

申请号：KR1020060063579

申请日：2006-07-06

Applicant: 한국과학기술원

Inventor： 조규형 ,  전용준 ,  손영석 ,  전진용 ,  이건호

IPC: H03M1/66

CPC classification number: H03M1/66 ,  H03M2201/61 ,  H03M2201/62 ,  H03M2201/81

Abstract: A current supply circuit and a digital analog converter provided with the same are provided to prevent the distortion of an output current caused by changes or ununiformity in a semiconductor process. A current supply circuit includes a corrector(310) and a current source unit(320). The corrector(310) includes a reference current source(ISRC1) and a reference current generator(3010). The reference current generator receives the reference current source to generate reference current. The current source part includes a first switch(SW1), a correction current generator(3020), a second switch(SW2), and a buffer(3000). The first switch is electrically connected with one of the reference current source and an output terminal. The correction current generator generates corrected current in accordance with the reference current generator. The second switch electrically connects the reference current generator and the correction current generator. The buffer is electrically connected between the first switch and the correction current generator.

Abstract translation: 提供电流供给电路和设置有电流供给电路的数字模拟转换器，以防止由半导体工艺中的变化或不均匀性引起的输出电流的失真。 电流源电路包括校正器（310）和电流源单元（320）。 校正器（310）包括参考电流源（ISRC1）和参考电流发生器（3010）。 参考电流发生器接收参考电流源以产生参考电流。 电流源部分包括第一开关（SW1），校正电流发生器（3020），第二开关（SW2）和缓冲器（3000）。 第一开关与参考电流源和输出端之一电连接。 校正电流发生器根据参考电流发生器产生校正电流。 第二开关电连接参考电流发生器和校正电流发生器。 缓冲器电连接在第一开关和校正电流发生器之间。

公开(公告)号：KR1020090109455A

公开(公告)日：2009-10-20

申请号：KR1020080056410

申请日：2008-06-16

Applicant: 한국과학기술원

Inventor： 류승탁 ,  이창교 ,  조상현

IPC: H03M1/12

CPC classification number: H03M1/14 ,  H03M1/002 ,  H03M1/06 ,  H03M2201/2291 ,  H03M2201/6142 ,  H03M2201/62 ,  H03M2201/81

Abstract: PURPOSE: A residue amplifier and an analog digital converter using the same are provided to improve dynamic range of input signal under the lowered source voltage condition. CONSTITUTION: A residual voltage amplifier(210) comprises an operational amplifier, and a capacitor circuit. The operational amplifier is connected to a first internal voltage. The capacitor circuit is connected to another input terminal of the operational amplifier. The capacitor circuit includes a first capacitor(C1), a second capacitor(C2), and a third capacitor. The first capacitor is connected to another input terminal of the operational amplifier. The second capacitor is connected to the common terminal of the first capacitor. The third capacitor is connected to the other input terminal of the operational amplifier. The third capacitor is connected to the output terminal of the operational amplifier.

Abstract translation: 目的：提供残留放大器和使用其的模拟数字转换器，以改善在较低的源电压条件下的输入信号的动态范围。 构成：残余电压放大器（210）包括运算放大器和电容器电路。 运算放大器连接到第一内部电压。 电容电路连接到运算放大器的另一输入端。 电容器电路包括第一电容器（C1），第二电容器（C2）和第三电容器。 第一电容器连接到运算放大器的另一个输入端。 第二电容器连接到第一电容器的公共端。 第三个电容连接到运算放大器的另一个输入端。 第三电容器连接到运算放大器的输出端。