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    Methods and Apparatus for MEMS Devices with Increased Sensitivity
    91.
    发明申请
    Methods and Apparatus for MEMS Devices with Increased Sensitivity 审中-公开
    具有增加灵敏度的MEMS器件的方法和装置

    公开(公告)号：US20150338435A1

    公开(公告)日：2015-11-26

    申请号：US14818095

    申请日：2015-08-04

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

    Inventor： Chia-Hua Chu ,  Chun-Wen Cheng

    IPC: G01P15/125 ,  G01P15/08 ,  B81C1/00 ,  G01C19/5719 ,  B81B3/00

    CPC classification number: B81B3/0059 ,  B81B3/0056 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2203/0118 ,  B81C1/00158 ,  B81C1/00714 ,  B81C2201/0112 ,  B81C2201/0132 ,  G01C19/5719 ,  G01P15/0802 ,  G01P15/125

    Abstract: Methods and apparatus for forming MEMS devices. An apparatus includes at least a portion of a semiconductor substrate having a first thickness and patterned to form a moveable mass; a moving sense electrode forming the first plate of a first capacitance; at least one anchor patterned from the semiconductor substrate and having a portion that forms the second plate of the first capacitance and spaced by a first gap from the first plate; a layer of semiconductor material of a second thickness patterned to form a first electrode forming a first plate of a second capacitance and further patterned to form a second electrode overlying the at least one anchor and forming a second plate spaced by a second gap that is less than the first gap; wherein a total capacitance is formed that is the sum of the first capacitance and the second capacitance. Methods are disclosed.

    Abstract translation: 用于形成MEMS器件的方法和装置。 一种装置包括具有第一厚度的半导体衬底的至少一部分并被图案化以形成可移动质量块; 形成第一电容的第一板的移动感测电极; 所述至少一个锚定体从所述半导体衬底图案化并且具有形成所述第一电容的所述第二板的部分并与所述第一板间隔开第一间隙; 图案化的第二厚度的半导体材料层，以形成形成第二电容的第一板的第一电极，并进一步图案化以形成覆盖至少一个锚的第二电极，并形成间隔第二间隙的第二板，该第二间隙较小 比第一个差距; 其中形成的总电容是第一电容和第二电容之和。 公开了方法。

    Robust high aspect ratio semiconductor device
    95.
    发明授权
    Robust high aspect ratio semiconductor device 有权
    坚固的高纵横比半导体器件

    公开(公告)号：US08809982B2

    公开(公告)日：2014-08-19

    申请号：US13121268

    申请日：2009-09-24

    Applicant: Freddy Roozeboom ,  Martijn Goossens ,  Willem Frederik Adrianus Besling ,  Nynke Verhaegh

    Inventor： Freddy Roozeboom ,  Martijn Goossens ,  Willem Frederik Adrianus Besling ,  Nynke Verhaegh

    IPC: H01L27/14 ,  B81B3/00 ,  B81C1/00 ,  H01L29/41 ,  H01L49/02

    CPC classification number: H01L29/41 ,  B81B3/007 ,  B81B2201/06 ,  B81C1/00619 ,  B81C2201/0112 ,  B81C2201/0132 ,  H01L28/91

    Abstract: The invention relates to an semi-conductor device comprising a first surface and neighboring first and second electric elements arranged on the first surface, in which each of the first and second elements extends from the first surface in a first direction, the first element having a cross section substantially perpendicular to the first direction and a sidewall surface extending at least partially in the first direction, wherein the sidewall surface comprises a first section and a second section adjoining the first section along a line extending substantially parallel to the first direction, wherein the first and second sections are placed at an angle with respect to each other for providing an inner corner wherein the sidewall surface at the inner corner is, at least partially, arranged at a constant distance R from a facing part of the second element for providing a mechanical reinforcement structure at the inner corner.

    Abstract translation: 本发明涉及一种半导体器件，其包括第一表面和布置在第一表面上的相邻的第一和第二电气元件，其中第一和第二元件中的每一个元件在第一方向上从第一表面延伸，第一元件具有 基本上垂直于第一方向的横截面和至少部分地沿第一方向延伸的侧壁表面，其中侧壁表面包括沿着基本上平行于第一方向延伸的线邻接第一部分的第一部分和第二部分，其中， 第一和第二部分相对于彼此以一定角度放置以提供内角，其中内角处的侧壁表面至少部分地布置成距离第二元件的面对部分恒定的距离R，以提供 机械加强结构在内角。

    HYBRID INTERGRATED COMPONENT AND METHOD FOR THE MANUFACTURE THEREOF
    97.
    发明申请
    HYBRID INTERGRATED COMPONENT AND METHOD FOR THE MANUFACTURE THEREOF 有权
    混合互联组件及其制造方法

    公开(公告)号：US20130299927A1

    公开(公告)日：2013-11-14

    申请号：US13888920

    申请日：2013-05-07

    Applicant: Axel Franke ,  Patrick Wellner ,  Lars Tebje

    Inventor： Axel Franke ,  Patrick Wellner ,  Lars Tebje

    IPC: B81B3/00 ,  B81C1/00

    CPC classification number: B81B3/0075 ,  B81C1/00626 ,  B81C1/00674 ,  B81C2201/0112 ,  B81C2201/014 ,  B81C2203/0109

    Abstract: Measures are proposed by which the design freedom is significantly increased in the case of the implementation of the micromechanical structure of the MEMS element of a component, which includes a carrier for the MEMS element and a cap for the micromechanical structure of the MEMS element, the MEMS element being mounted on the carrier via a standoff structure. The MEMS element is implemented in a layered structure, and the micromechanical structure of the MEMS element extends over at least two functional layers of this layered structure, which are separated from one another by at least one intermediate layer.

    Abstract translation: 提出的措施是，在实现元件的MEMS元件的微机械结构的情况下，设计自由度显着增加，其包括用于MEMS元件的载体和用于MEMS元件的微机械结构的盖， MEMS元件通过支架结构安装在载体上。 MEMS元件以分层结构实现，并且MEMS元件的微机械结构在该分层结构的至少两个功能层上延伸，所述功能层通过至少一个中间层彼此分离。

    METHOD AND APPARATUS FOR ETCHING
    98.
    发明申请
    METHOD AND APPARATUS FOR ETCHING 失效
    用于蚀刻的方法和装置

    公开(公告)号：US20100308014A1

    公开(公告)日：2010-12-09

    申请号：US12786006

    申请日：2010-05-24

    Applicant: Alan Cheshire

    Inventor： Alan Cheshire

    IPC: C23F1/00

    CPC classification number: B81C1/00531 ,  B81C2201/0112 ,  H01J37/321 ,  H01J37/3244 ,  H01J37/32449 ,  H01L21/30655

    Abstract: Embodiments of the invention relate to a substrate etching method and apparatus. In one embodiment, a method for etching a substrate in a plasma etch reactor is provided that includes a) depositing a polymer on a substrate in an etch reactor, b) etching the substrate using a gas mixture including a fluorine-containing gas and oxygen in the etch reactor, c) etching a silicon-containing layer the substrate using a fluorine-containing gas without mixing oxygen in the etch reactor, and d) repeating a), b) and c) until an endpoint of a feature etched into the silicon-containing layer is reached.

    Abstract translation: 本发明的实施例涉及一种基板蚀刻方法和装置。 在一个实施例中，提供了一种在等离子体蚀刻反应器中蚀刻衬底的方法，其包括：a）在蚀刻反应器中在衬底上沉积聚合物，b）使用包含含氟气体和氧的气体混合物蚀刻衬底 蚀刻反应器，c）使用含氟气体在含氧气体中蚀刻含硅层，而不在蚀刻反应器中混合氧，以及d）重复a），b）和c）直到蚀刻到硅中的特征的端点 到达层。

    Method of forming an ink supply channel
    99.
    发明授权
    Method of forming an ink supply channel 有权
    形成供墨通道的方法

    公开(公告)号：US07837887B2

    公开(公告)日：2010-11-23

    申请号：US12542659

    申请日：2009-08-17

    Applicant: Darrell LaRue McReynolds ,  Kia Silverbrook

    Inventor： Darrell LaRue McReynolds ,  Kia Silverbrook

    IPC: G11B5/127

    CPC classification number: H01L21/02057 ,  B41J2/1412 ,  B41J2/1601 ,  B41J2/1623 ,  B41J2/1628 ,  B41J2/1631 ,  B41J2/164 ,  B81B2201/052 ,  B81B2203/033 ,  B81C1/00849 ,  B81C2201/0112 ,  B81C2201/0132

    Abstract: A method of forming an ink supply channel for an inkjet printhead comprises the steps of: (i) providing a wafer having a frontside and a backside; (ii) etching a plurality of frontside trenches into the frontside; (iii) filling each of the trenches with a photoresist plug; (iv) forming nozzle structures on the frontside using MEMS fabrication processes; (v) etching a backside trench from the backside, the backside trench meeting with one or more of the plugs; (vi) removing a portion of each photoresist plug via the backside trench by subjecting the backside to a biased oxygen plasma etch, thereby exposing sidewall features in the backside trench; (vii) modifying the exposed sidewall features; and (viii) removing the photoresist plugs to form the ink supply channel. The ink supply channel connects the backside to the frontside.

    Abstract translation: 一种形成用于喷墨打印头的供墨通道的方法包括以下步骤：（i）提供具有前侧和后侧的晶片; （ii）将多个前侧沟槽蚀刻到前侧; （iii）用光致抗蚀剂插塞填充每个沟槽; （iv）使用MEMS制造工艺在前侧形成喷嘴结构; （v）从背面蚀刻背面沟槽，所述背面沟槽与一个或多个所述插头相会合; （vi）通过使背面经受偏压的氧等离子体蚀刻，从而暴露背面沟槽中的侧壁特征，通过背侧沟槽去除每个光致抗蚀剂插塞的一部分; （vii）修改暴露的侧壁特征; 和（viii）去除光致抗蚀剂插头以形成供墨通道。 供墨通道将背面连接到前侧。

    Small scale wires with microelectromechanical devices
    100.
    发明授权
    Small scale wires with microelectromechanical devices 有权
    小型电线与微机电装置

    公开(公告)号：US07022617B2

    公开(公告)日：2006-04-04

    申请号：US10606812

    申请日：2003-06-26

    Applicant: Kanakasabapathi Subramanian ,  Noel C. MacDonald

    Inventor： Kanakasabapathi Subramanian ,  Noel C. MacDonald

    IPC: H01L21/461

    CPC classification number: B81C1/00142 ,  B81B2203/0361 ,  B81C1/00071 ,  B81C1/00111 ,  B81C2201/0112 ,  Y10S977/70 ,  Y10S977/762

    Abstract: A process cycles between etching and passivating chemistries to create rough sidewalls that are converted into small structures. In one embodiment, a mask is used to define lines in a single crystal silicon wafer. The process creates ripples on sidewalls of the lines corresponding to the cycles. The lines are oxidized in one embodiment to form a silicon wire corresponding to each ripple. The oxide is removed in a further embodiment to form structures ranging from micro sharp tips to photonic arrays of wires. Fluidic channels are formed by oxidizing adjacent rippled sidewalls. The same mask is also used to form other structures for MEMS devices.

    Abstract translation: 蚀刻和钝化化学物质之间的过程循环，以产生转变成小结构的粗糙侧壁。 在一个实施例中，使用掩模来限定单晶硅晶片中的线。 该过程在对应于循环的线的侧壁上产生波纹。 在一个实施例中，线被氧化以形成对应于每个纹波的硅线。 在另一个实施方案中去除氧化物以形成从微尖端到光线阵列的结构。 通过氧化相邻的波纹侧壁形成流体通道。 同样的掩模也用于形成MEMS器件的其他结构。

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