公开(公告)号：US4457950A

公开(公告)日：1984-07-03

申请号：US497578

申请日：1983-05-24

Applicant: Tsuyoshi Fujita ,  Shinichi Komatsu ,  Gyozo Toda

Inventor： Tsuyoshi Fujita ,  Shinichi Komatsu ,  Gyozo Toda

IPC: H05K3/46 ,  H05K3/10 ,  B05D3/06

CPC classification number: H05K3/105 ,  H05K2201/0179 ,  H05K2203/107 ,  H05K2203/125

Abstract: A wiring circuit board with a fine wiring pattern free from disconnection and poor insulation is produced by forming an insulating layer consisting of at least two insulating substances having different dissociation energies for metalization, including metal elements, on a substrate and irradiating the insulating layer with an energizing beam by scanning, thereby forming a wiring pattern as desired.

Abstract translation: 通过在基板上形成由至少两种具有不同的金属化解离能的分解能量的绝缘物质构成的绝缘层，在基板上形成绝缘层，并且在绝缘层上照射绝缘层， 通过扫描激励光束，从而根据需要形成布线图案。

公开(公告)号：US3749601A

公开(公告)日：1973-07-31

申请号：US3749601D

申请日：1971-04-01

Applicant: HUGHES AIRCRAFT CO

Inventor： TITTLE H

IPC: H01C1/034 ,  H01L23/31 ,  H05K3/28 ,  H05K5/06 ,  H01L1/10

CPC classification number: H05K5/065 ,  H01C1/034 ,  H01L23/3135 ,  H01L2924/0002 ,  H05K3/284 ,  H05K2201/0179 ,  H05K2201/09872 ,  H05K2203/1316 ,  H05K2203/1322 ,  Y10T29/49146 ,  Y10T428/239 ,  Y10T428/31515 ,  Y10T428/31587 ,  H01L2924/00

Abstract: AN IMPROVEMENT IN THE ECONOMY OF PACKAGING BY LOCKING OUT HARMFUL PARTICULATES BEFORE APPLICATON OF INSULATION PACKING AND SAVINGS IN REWORK OR REPAIR OF INSULATION PACKAGED AND ENCAPSULATED ELECTRICAL COMPONENTS, ASSEMBLIES OR CIRCUITRY. THE THREE COMPONENT PACKAGE STRUCTURE PROVIDED IS PREFABRICATED ELECTRONIC CIRCUITRY COMPONENTS STRUCTURE HAVING A CONFORMAL COATING OF RELATIVELY SOLVENT INSOLUBLE POLYMERS AS POLYMERS OF PARA-XYLYLENE MATERIAL OR RELATIVELY SOLVENT INSOLUBLE POLYMERS OF POLYPHENYLENE AND CURING AGENT INTERMEDIATE THE ELECTRONIC COMPONENTS AND A CONVENTIONALLY APPLIED RELATIVELY SOLVENT SOLUBLE COATING OF INSULATING RESIN MATERIAL OR CONVENTIONAL FOAM AS POLYURETHANE, EPOXY RESIN, AND THE LIKE POTTING MATERIAL APPLIED THEREOVER. IN ADDITION TO IMPROVING UPON THE INSULATION ENCAPSULATED PREFABRICATED ELECTRONIC CIRCUITRY BY REDUCING THE NUMBER OF DEFECTIVE ELECTRONIC UNIT MANUFACTURED, THIS IMPROVED PACKAGING ALSO IS OF ECONOMIC VALUE TO THE INDUSTRY BY ENABLING ECONOMIC CHEMICAL REMOVAL OF THE INSULATING FOAM OR POTTING COMPOUND AND REWORKING THE CIRCUITRY OR REPLACEMENT OF A DEFECTIVE CIRCUITRY COMPONENT.

FURTHER, THE MULTIPLE COATINGS PROVIDE MORE ASSURANCE OF MAINTAINING RESONATE FREQUENCY AND AIDS IN IMPROVING VIBRATION AND SHOCK RESISTANCE.

公开(公告)号：US20240268022A1

公开(公告)日：2024-08-08

申请号：US18289769

申请日：2022-08-23

Applicant: NOF CORPORATION

Inventor： Toshinobu FUJIMURA ,  Katsumi NAKASATO ,  Muneaki IIZUKA

IPC: H05K1/05 ,  C23C16/40 ,  C23C16/448 ,  H01L21/48 ,  H01L23/373 ,  H05K1/02 ,  H05K3/44

CPC classification number: H05K1/053 ,  C23C16/403 ,  C23C16/4486 ,  H01L21/4846 ,  H01L23/3735 ,  H05K1/0209 ,  H05K3/44 ,  H05K2201/0179 ,  H05K2201/0191 ,  H05K2203/088

Abstract: According to the present invention, a heat-dissipating circuit board is formed by providing a metal material adjacent to one surface of an insulating layer and providing a conductive metal layer to the other surface of the insulating layer. The metal material is a sheet of copper or a copper alloy or aluminum or an aluminum alloy and is 0.2-20 mm thick. The insulating layer is a metal oxide layer that has the composition AlxOyTz, is 0.2-30 μm thick, has a volume resistivity of at least 1000 GΩ·cm, and has a porosity of no more than 10%. The heat-dissipating circuit board has excellent heat-dissipation properties and insulation properties.

公开(公告)号：US09374889B2

公开(公告)日：2016-06-21

申请号：US14202140

申请日：2014-03-10

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Kei Murayama ,  Mitsuhiro Aizawa ,  Koji Hara

IPC: H05K1/14 ,  H05K1/02 ,  H05K3/46 ,  H01L23/00 ,  H05K1/03 ,  H05K3/40

CPC classification number: H05K1/0271 ,  H01L21/563 ,  H01L23/00 ,  H01L23/13 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15311 ,  H05K1/0306 ,  H05K3/4061 ,  H05K3/467 ,  H05K3/4688 ,  H05K2201/0179 ,  H05K2201/068 ,  H05K2201/10378 ,  H01L2924/00

Abstract: An interposer includes a wiring member including a first inorganic substrate, a reinforcement member including a second inorganic substrate, and an adhesive part interposed between the wiring member and the reinforcement member. Each of the first and second inorganic substrates includes first and second surfaces. Multiple inorganic insulating layers formed on the first surface of each of the first and second inorganic substrates have the same layer configuration and are arranged symmetrically in a vertical direction with the adhesive part centered therebetween. An inorganic insulating layer and an organic insulating layer formed on the second surface of each of the first and second inorganic substrates have the same layer configuration and are arranged symmetrically in the vertical direction with the adhesive part. An organic insulating layer formed on the second surface of each of the first and second inorganic substrates is an outermost insulating layer.

Abstract translation: 插入件包括布线构件，该布线构件包括第一无机基板，包括第二无机基板的加强构件和插入在布线构件和加强构件之间的粘合部。 第一和第二无机基材中的每一个包括第一和第二表面。 形成在第一和第二无机基板的每一个的第一表面上的多个无机绝缘层具有相同的层构造，并且在粘合剂部分居中的同时在垂直方向上对称地布置。 形成在第一和第二无机基板的第二表面上的无机绝缘层和有机绝缘层具有相同的层构造，并且在垂直方向上与粘合部对称地配置。 形成在第一和第二无机基板的第二表面上的有机绝缘层是最外层的绝缘层。

公开(公告)号：US09131863B2

公开(公告)日：2015-09-15

申请号：US11441993

申请日：2006-05-26

Applicant: Robert Greenberg ,  Neil Hamilton Talbot ,  Jerry Ok ,  Jordan Matthew Neysmith

Inventor： Robert Greenberg ,  Neil Hamilton Talbot ,  Jerry Ok ,  Jordan Matthew Neysmith

IPC: A61N1/05 ,  A61B5/04 ,  H05K1/03 ,  H05K3/00 ,  C23C16/01 ,  C23C16/56 ,  H05K3/04 ,  H05K3/06 ,  H05K3/28 ,  H05K3/46

CPC classification number: A61B5/04001 ,  A61B2562/125 ,  A61N1/0529 ,  A61N1/0543 ,  A61N1/0551 ,  A61N1/0553 ,  C23C16/01 ,  C23C16/56 ,  H05K1/032 ,  H05K3/007 ,  H05K3/048 ,  H05K3/06 ,  H05K3/28 ,  H05K3/4676 ,  H05K2201/0179 ,  H05K2203/016 ,  H05K2203/0502 ,  H05K2203/176 ,  Y10T29/49124 ,  Y10T29/49155

Abstract: The invention is directed to an implantable insulated electrical circuit that utilizes polyparaxylylene, preferably as Parylene, a known polymer that has excellent living tissue implant characteristics, to provide for chronic implantation of conductive electrical devices, such as stimulators and sensors. The device is thin, flexible, electrically insulated, and stable after long exposure to living tissue. Layers of Parylene may be combined with layers of a polymer, such as polyimide, to yield greater design flexibility in the circuit. Multiple electrical conduction layers may be stacked in the circuit to increase packing density.

Abstract translation: 本发明涉及一种可植入绝缘电路，其利用聚对二甲苯，优选作为聚对二甲苯（parylene），已知具有极好活体组织植入特征的聚合物，以提供诸如刺激剂和传感器的导电电气装置的慢性植入。 该设备在长时间暴露于生物体组织之后，薄，柔性，电绝缘和稳定。 聚对二甲苯层可以与诸如聚酰亚胺的聚合物层结合，以在电路中产生更大的设计灵活性。 多个导电层可以堆叠在电路中以增加堆积密度。

公开(公告)号：US20150036299A1

公开(公告)日：2015-02-05

申请号：US14306056

申请日：2014-06-16

Applicant: Samsung Display Co., Ltd.

Inventor： Jun NAMKUNG ,  Seong-Jun LEE

IPC: H05K1/02

CPC classification number: G02F1/133345 ,  G02F1/133305 ,  G02F2001/133311 ,  G02F2001/133388 ,  G02F2201/50 ,  H01L27/3244 ,  H01L27/3276 ,  H01L51/5253 ,  H01L2251/5338 ,  H01L2251/566 ,  H05K1/0271 ,  H05K1/036 ,  H05K1/0393 ,  H05K3/0052 ,  H05K3/28 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0195 ,  H05K2201/09036 ,  H05K2201/10136 ,  Y10T428/10 ,  Y10T428/1036

Abstract: A flexible display device that can suppress spread of cracks of an inorganic layer is provided. A flexible display device includes a flexible substrate including a display area and a periphery surrounding the display area, an inorganic layer formed on the flexible substrate, a display unit formed on the display area, and a thin film encapsulation layer covering the display unit. The inorganic layer includes an opening disposed on a periphery between edges of the flexible substrate and the thin film encapsulation layer.

Abstract translation: 提供了可以抑制无机层的裂纹扩展的柔性显示装置。 柔性显示装置包括柔性基板，其包括显示区域和围绕显示区域的外围，形成在柔性基板上的无机层，形成在显示区域上的显示单元和覆盖显示单元的薄膜封装层。 无机层包括设置在柔性基板的边缘与薄膜封装层的边缘之间的开口。

公开(公告)号：US08883606B2

公开(公告)日：2014-11-11

申请号：US14035195

申请日：2013-09-24

Applicant: BlackBerry Limited

Inventor： Ivoyl P. Koutsaroff ,  Mark Vandermeulen ,  Andrew Vladimir Claude Cervin ,  Atin J. Patel

IPC: H01L21/20 ,  H05K1/16 ,  H01G4/38 ,  H01L27/01 ,  H01G4/33 ,  H01G13/04 ,  H05K3/38 ,  H05K1/03

CPC classification number: H01G4/38 ,  H01G4/33 ,  H01G13/04 ,  H01L27/016 ,  H05K1/0306 ,  H05K1/162 ,  H05K3/38 ,  H05K3/388 ,  H05K2201/0175 ,  H05K2201/0179 ,  Y10T29/49126 ,  Y10T29/49155

Abstract: In accordance with the teachings described herein, a multi-level thin film capacitor on a ceramic substrate and method of manufacturing the same are provided. The multi-level thin film capacitor (MLC) may include at least one high permittivity dielectric layer between at least two electrode layers, the electrode layers being formed from a conductive thin film material. A buffer layer may be included between the ceramic substrate and the thin film MLC. The buffer layer may have a smooth surface with a surface roughness (Ra) less than or equal to 0.08 micrometers (um).

Abstract translation: 根据本文所述的教导，提供了陶瓷基板上的多层薄膜电容器及其制造方法。 多层薄膜电容器（MLC）可以在至少两个电极层之间包括至少一个高介电常数介电层，电极层由导电薄膜材料形成。 陶瓷基板和薄膜MLC之间可以包括缓冲层。 缓冲层可以具有小于或等于0.08微米（μm）的表面粗糙度（Ra）的光滑表面。

公开(公告)号：US08837160B2

公开(公告)日：2014-09-16

申请号：US13175683

申请日：2011-07-01

Applicant: Takashi Kariya ,  Hironori Tanaka

Inventor： Takashi Kariya ,  Hironori Tanaka

IPC: H05K1/16 ,  H01L21/48 ,  H01L23/50 ,  H01L23/498 ,  H05K3/38 ,  H05K3/46

CPC classification number: H05K1/162 ,  H01L21/4867 ,  H01L23/498 ,  H01L23/50 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K3/388 ,  H05K3/4602 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0195 ,  H05K2201/09309 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09718 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  H01L2924/00

Abstract: A method of producing a capacitor for a printed circuit board includes producing high-dielectric sheets and selecting ones of the high-dielectric sheets, which are substantially free from a defect after the heat process. Each of the high-dielectric sheets is produced by providing a first electrode, forming a first sputter film on the first electrode, forming an intermediate layer on the first sputter film by calcining a sol-gel film, forming a second sputter film on the intermediate layer, and providing a second electrode on the second sputter film. The high-dielectric sheets are subjected to a heat process in which the high-dielectric sheets are subjected to a first temperature at least once and a second temperature higher than the first temperature at least once.

Abstract translation: 一种印刷电路板用电容器的制造方法，其特征在于，制造高介电质片材，并选择在热处理后基本上不存在缺陷的高电介质片材。 每个高电介质片通过提供第一电极来制造，在第一电极上形成第一溅射膜，通过煅烧溶胶 - 凝胶膜在第一溅射膜上形成中间层，在中间层上形成第二溅射膜 并且在第二溅射膜上提供第二电极。 对高电介质片材进行热处理，其中高电介质片材经受至少一次的第一温度和比第一温度高至少一次的第二温度。

公开(公告)号：US08707552B2

公开(公告)日：2014-04-29

申请号：US11580927

申请日：2006-10-16

Applicant: Takashi Kariya ,  Hironori Tanaka

Inventor： Takashi Kariya ,  Hironori Tanaka

IPC: H05K3/30

CPC classification number: H05K1/162 ,  H01L21/4867 ,  H01L23/498 ,  H01L23/50 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K3/388 ,  H05K3/4602 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0195 ,  H05K2201/09309 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09718 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  H01L2924/00

Abstract: A high-dielectric sheet for a printed circuit board includes a first electrode, a first sputter film formed on the first electrode, an intermediate layer formed on the first sputter film by calcining a sol-gel film, a second sputter film formed on the intermediate layer, and a second electrode provided on the second sputter film.

Abstract translation: 用于印刷电路板的高电介质片包括第一电极，形成在第一电极上的第一溅射膜，通过煅烧溶胶 - 凝胶膜在第一溅射膜上形成的中间层，形成在中间体上的第二溅射膜 层和设置在第二溅射膜上的第二电极。

公开(公告)号：US08618593B2

公开(公告)日：2013-12-31

申请号：US13214773

申请日：2011-08-22

Applicant: Islam A. Salama ,  Yongki Min

Inventor： Islam A. Salama ,  Yongki Min

IPC: H01L27/108 ,  H01L29/94 ,  H01L21/02

CPC classification number: H05K1/162 ,  H01L23/49822 ,  H01L23/50 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H05K3/4602 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2203/1105

Abstract: Some embodiments of the invention include thin film capacitors formed on a package substrate of an integrated circuit package. At least one of the film capacitors includes a first electrode layer, a second electrode layer, and a dielectric layer between the first and second electrode layers. Each of the first and second electrode layers and the dielectric layer is formed individually and directly on the package substrate. Other embodiments are described and claimed.

Abstract translation: 本发明的一些实施例包括形成在集成电路封装的封装衬底上的薄膜电容器。 薄膜电容器中的至少一个包括在第一和第二电极层之间的第一电极层，第二电极层和电介质层。 第一和第二电极层和电介质层中的每一个单独形成并直接形成在封装衬底上。 描述和要求保护其他实施例。