公开(公告)号：US07999193B2

公开(公告)日：2011-08-16

申请号：US12247471

申请日：2008-10-08

Applicant: Katsuya Fukase ,  Kishio Yokouchi ,  Hideaki Yoshimura

Inventor： Katsuya Fukase ,  Kishio Yokouchi ,  Hideaki Yoshimura

IPC: H05K1/11

CPC classification number: H05K3/445 ,  H05K1/056 ,  H05K3/4046 ,  H05K3/4602 ,  H05K3/4608 ,  H05K2201/0323 ,  H05K2201/09827 ,  H05K2201/10234 ,  H05K2201/10416 ,  Y10T29/49124

Abstract: There is provided a wiring substrate. The wiring substrate includes: a core substrate formed of a conductive material and having a through hole therein; an insulating layer formed on first and second surfaces of the core substrate; wiring patterns formed on the first and second surfaces via the insulating layer; and a via formed in the through hole and electrically connected to the wiring patterns. The via includes: a conductor ball and a conductor portion. The conductor ball has a conductive surface and an insulating member covering the conductive surface. A portion of the conductive surface is exposed from the insulating member. The conductor portion is electrically connected to the exposed conductive surface and the wiring patterns. At least one of the insulating member and the insulating layer is interposed between the via and the core substrate.

Abstract translation: 提供了布线基板。 布线基板包括：由导电材料形成并在其中具有通孔的芯基板; 绝缘层，形成在所述芯基板的第一和第二表面上; 通过绝缘层在第一和第二表面上形成的布线图案; 以及形成在通孔中并且电连接到布线图案的通孔。 通孔包括：导体球和导体部分。 导体球具有导电表面和覆盖导电表面的绝缘构件。 导电表面的一部分从绝缘构件露出。 导体部分电连接到暴露的导电表面和布线图案。 绝缘构件和绝缘层中的至少一个介于通路和芯基板之间。

公开(公告)号：US07900809B2

公开(公告)日：2011-03-08

申请号：US12146798

申请日：2008-06-26

Applicant: Glenn G. Daves ,  David L. Edwards ,  Mukta G. Farooq ,  Frank L. Pompeo

Inventor： Glenn G. Daves ,  David L. Edwards ,  Mukta G. Farooq ,  Frank L. Pompeo

IPC: B23K31/02

CPC classification number: B23K3/0638 ,  B23K2101/40 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/15311 ,  H05K3/301 ,  H05K3/303 ,  H05K3/305 ,  H05K2201/0209 ,  H05K2201/09909 ,  H05K2201/10234 ,  H05K2201/10734 ,  H05K2201/10977 ,  H05K2201/2018 ,  H05K2201/2036 ,  Y02P70/613 ,  Y10T29/49144 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A method for assembling, and the resultant electronic module, includes attaching a chip to a substrate using a first solder interconnection array, and attaching a board to the substrate using a second solder interconnection array, which may be a single-melt or a dual-melt solder array. The second solder interconnection array resides entirely within a space defined between the board and substrate. A creep resistant structure is provided within this space for maintaining the defined space and optimizing integrity of the second solder interconnection array. The creep resistant structure may include an underfill material, balls, brackets, frames, collars or combinations thereof. Wherein the creep resistant structure is an underfill material, it is crucial that the substrate be attached to the board before either entirely encapsulating the second interconnection array with underfill material, or partially encapsulating the second solder interconnection array at discrete locations with underfill material.

Abstract translation: 一种用于组装的方法，并且所得到的电子模块包括使用第一焊料互连阵列将芯片附接到衬底，并且使用第二焊料互连阵列将衬底附接到衬底，第二焊料互连阵列可以是单熔体或双 - 熔融焊料阵列。 第二焊料互连阵列完全位于限定在板和衬底之间的空间内。 在该空间内设有抗蠕变结构，用于维持限定的空间并优化第二焊料互连阵列的完整性。 抗蠕变结构可以包括底部填充材料，球，支架，框架，套环或其组合。 其中抗蠕变结构是底部填充材料，在将基底完全用底部填充材料完全封装第二互连阵列之前，或者在具有底部填充材料的离散位置部分地封装第二焊料互连阵列之前，衬底附着到板上是至关重要的。

公开(公告)号：US20100230143A1

公开(公告)日：2010-09-16

申请号：US12787485

申请日：2010-05-26

Applicant: Stephen Leslie Buchwalter ,  Bruce K. Furman ,  Peter A. Gruber ,  Jae-Woong Nah ,  Da-Yuan Shih

Inventor： Stephen Leslie Buchwalter ,  Bruce K. Furman ,  Peter A. Gruber ,  Jae-Woong Nah ,  Da-Yuan Shih

IPC: H05K1/03

CPC classification number: H01L24/16 ,  H01L21/563 ,  H01L21/6835 ,  H01L24/11 ,  H01L24/12 ,  H01L24/27 ,  H01L24/28 ,  H01L24/31 ,  H01L24/73 ,  H01L24/81 ,  H01L24/94 ,  H01L2221/68377 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/11003 ,  H01L2224/1131 ,  H01L2224/11334 ,  H01L2224/114 ,  H01L2224/116 ,  H01L2224/11822 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1357 ,  H01L2224/136 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/17051 ,  H01L2224/274 ,  H01L2224/29111 ,  H01L2224/73104 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/0001 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K3/3436 ,  H05K2201/0379 ,  H05K2201/094 ,  H05K2201/10234 ,  H05K2201/10242 ,  H05K2201/10977 ,  Y02P70/613 ,  Y10T29/49165 ,  H01L2224/45111 ,  H01L2924/01047 ,  H01L2224/13099 ,  H01L2924/01083 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: An electrical structure including a first substrate comprising a first electrically conductive pad, a second substrate comprising a second electrically conductive pad, and an interconnect structure electrically and mechanically connecting the first electrically conductive pad to the second electrically conductive pad. The interconnect structure comprises a non-solder metallic core structure, a first solder structure, and a second solder structure. The first solder structure electrically and mechanically connects a first portion of the non-solder metallic core structure to the first electrically conductive pad. The second solder structure electrically and mechanically connects a second portion of the non-solder metallic core structure to the second electrically conductive pad.

Abstract translation: 一种电结构，包括包括第一导电焊盘的第一基板，包括第二导电焊盘的第二基板和将第一导电焊盘电连接和机械连接到第二导电焊盘的互连结构。 互连结构包括非焊料金属芯结构，第一焊料结构和第二焊料结构。 第一焊料结构将非焊料金属芯结构的第一部分电连接并机械地连接到第一导电焊盘。 第二焊料结构将非焊料金属芯结构的第二部分电连接并机械连接到第二导电焊盘。

公开(公告)号：US07786001B2

公开(公告)日：2010-08-31

申请号：US11733840

申请日：2007-04-11

Applicant: Stephen Leslie Buchwalter ,  Bruce K. Furman ,  Peter A. Gruber ,  Jae-Woong Nah ,  Da-Yuan Shih

Inventor： Stephen Leslie Buchwalter ,  Bruce K. Furman ,  Peter A. Gruber ,  Jae-Woong Nah ,  Da-Yuan Shih

IPC: H01L21/44

CPC classification number: H01L24/16 ,  H01L21/563 ,  H01L21/6835 ,  H01L24/11 ,  H01L24/12 ,  H01L24/27 ,  H01L24/28 ,  H01L24/31 ,  H01L24/73 ,  H01L24/81 ,  H01L24/94 ,  H01L2221/68377 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/11003 ,  H01L2224/1131 ,  H01L2224/11334 ,  H01L2224/114 ,  H01L2224/116 ,  H01L2224/11822 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1357 ,  H01L2224/136 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/17051 ,  H01L2224/274 ,  H01L2224/29111 ,  H01L2224/73104 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/0001 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K3/3436 ,  H05K2201/0379 ,  H05K2201/094 ,  H05K2201/10234 ,  H05K2201/10242 ,  H05K2201/10977 ,  Y02P70/613 ,  Y10T29/49165 ,  H01L2224/45111 ,  H01L2924/01047 ,  H01L2224/13099 ,  H01L2924/01083 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: An electrical structure and method of forming. The electrical structure includes a first substrate comprising a first electrically conductive pad, a second substrate comprising a second electrically conductive pad, and an interconnect structure electrically and mechanically connecting the first electrically conductive pad to the second electrically conductive pad. The interconnect structure comprises a non-solder metallic core structure, a first solder structure, and a second solder structure. The first solder structure electrically and mechanically connects a first portion of the non-solder metallic core structure to the first electrically conductive pad. The second solder structure electrically and mechanically connects a second portion of the non-solder metallic core structure to the second electrically conductive pad.

Abstract translation: 一种电气结构和成型方法。 电结构包括第一衬底，其包括第一导电焊盘，第二衬底，其包括第二导电焊盘，以及将第一导电焊盘电连接和机械连接到第二导电焊盘的互连结构。 互连结构包括非焊料金属芯结构，第一焊料结构和第二焊料结构。 第一焊料结构将非焊料金属芯结构的第一部分电连接并机械地连接到第一导电焊盘。 第二焊料结构将非焊料金属芯结构的第二部分电连接并机械连接到第二导电焊盘。

公开(公告)号：US07705458B2

公开(公告)日：2010-04-27

申请号：US11425353

申请日：2006-06-20

Applicant: Daewoong Suh ,  Yongki Min

Inventor： Daewoong Suh ,  Yongki Min

IPC: H01L23/488

CPC classification number: H01L24/10 ,  C22C45/10 ,  H01L23/49816 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/351 ,  H05K1/09 ,  H05K1/111 ,  H05K3/3436 ,  H05K2201/0116 ,  H05K2201/10234 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A foamed bulk metallic glass electrical connection is formed on a substrate of an integrated circuit package. The foamed bulk metallic glass electrical connection exhibits a low modulus that resists cracking during shock and dynamic loading. The foamed bulk metallic glass electrical connection is used as a solder bump for communication between an integrated circuit device and external structures. A process of forming the foamed bulk metallic glass electrical connection includes mixing bulk metallic glass with a blowing agent.

Abstract translation: 在集成电路封装的基板上形成发泡体金属玻璃电连接。 发泡体金属玻璃电气连接显示出低冲击强度和动态载荷下的抗开裂性能。 发泡体金属玻璃电连接用作集成电路器件和外部结构之间的通信的焊料凸块。 形成发泡体金属玻璃电连接的方法包括将块状金属玻璃与发泡剂混合。

公开(公告)号：US07656013B2

公开(公告)日：2010-02-02

申请号：US12205057

申请日：2008-09-05

Applicant: Michio Horiuchi ,  Fumimasa Katagiri ,  Shigeaki Suganuma ,  Yasue Tokutake ,  Jun Yoshiike

Inventor： Michio Horiuchi ,  Fumimasa Katagiri ,  Shigeaki Suganuma ,  Yasue Tokutake ,  Jun Yoshiike

IPC: H01L23/495

CPC classification number: H01L23/49861 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/45 ,  H01L24/48 ,  H01L2221/68345 ,  H01L2223/6611 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/48091 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48699 ,  H01L2224/48755 ,  H01L2224/48764 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/73204 ,  H01L2224/85455 ,  H01L2224/85464 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19051 ,  H01L2924/19107 ,  H01L2924/20753 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K3/222 ,  H05K3/4046 ,  H05K3/4614 ,  H05K3/4652 ,  H05K2201/10234 ,  H05K2201/10287 ,  H05K2203/0733 ,  H01L2924/00014 ,  H01L2924/20752 ,  H01L2924/00

Abstract: There is provided a multilayer wiring substrate on which at least one semiconductor element is mounted. The multilayer wiring substrate includes: a baseboard; a first wiring layer formed on the baseboard and having a plurality of first wiring portions; an insulating layer formed on the baseboard; a second wiring layer formed on the insulating layer and having a plurality of second wiring portions, the second wiring portions being electrically connected to each other via a conductor wire, the conductor wire being arranged within the insulating layer three-dimensionally in a curved manner; and conductor portions configured to pass through the insulating layer and connecting the first wiring portions and the second wiring portions.

Abstract translation: 提供了一种其上安装有至少一个半导体元件的多层布线基板。 多层布线基板包括：基板; 形成在所述基板上并具有多个第一布线部的第一布线层; 形成在基板上的绝缘层; 形成在所述绝缘层上并且具有多个第二布线部的第二布线层，所述第二布线部经由导体布线彼此电连接，所述导线以三维方式弯曲地布置在所述绝缘层内; 以及导体部，被配置为穿过所述绝缘层并连接所述第一布线部和所述第二布线部。

公开(公告)号：US20100022105A1

公开(公告)日：2010-01-28

申请号：US12506974

申请日：2009-07-21

Applicant: Thomas H. Di Stefano

Inventor： Thomas H. Di Stefano

IPC: H01R12/00

CPC classification number: H05K3/32 ,  H01R12/52 ,  H01R13/11 ,  H05K3/3436 ,  H05K7/1061 ,  H05K2201/0379 ,  H05K2201/10234 ,  H05K2201/10242 ,  H05K2201/10333 ,  H05K2201/10424 ,  H05K2201/10734 ,  Y02P70/613

Abstract: One embodiment is a connector for making electrical connection to a bulbous terminal, the connector including: a metal tube with a cylindrical wall extending from a mating end, wherein: (a) two or more slots perforate the wall and extend from the mating end along the tube; (b) two or more apertures perforate the wall and are disposed in a circumferential array disposed a distance from the mating end; and (c) each of the two or more slots transects one of the two or more apertures to divide the mating end of the tube into resilient prongs.

Abstract translation: 一个实施例是用于与球根端子进行电连接的连接器，该连接器包括：金属管，其具有从配合端延伸的圆柱形壁，其中：（a）两个或更多个狭缝在壁上穿孔并从配合端沿着 管子 （b）两个或更多个孔穿过该壁并设置在与配合端一定距离设置的圆周阵列中; 和（c）两个或更多个槽中的每一个横切两个或更多个孔中的一个，以将管的配合端分成弹性插脚。

公开(公告)号：US07581961B2

公开(公告)日：2009-09-01

申请号：US11889173

申请日：2007-08-09

Applicant: Tomonari Ohtsuki ,  Katsuya Yamagami

Inventor： Tomonari Ohtsuki ,  Katsuya Yamagami

IPC: H01R12/00

CPC classification number: B23K3/085 ,  B23K2101/38 ,  B23K2103/12 ,  H05K3/341 ,  H05K3/3494 ,  H05K3/4015 ,  H05K2201/10234 ,  H05K2203/107 ,  H05K2203/1121 ,  Y02P70/613 ,  Y10T29/49149 ,  Y10T29/49179 ,  Y10T29/4921 ,  Y10T428/24917

Abstract: Method for preventing solder from rising to a portion of an electric contact when the electric contact is being soldered to a copper foil so as to extend therefrom. The portion is plated with a noble metal and adapted to contact a mating object. Cooling means is brought into contact with at least the portion of the electric contact adapted to contact the mating object, and connection portion between the electric contact and the copper foil is heated by heating means. The rising of solder can be prevented and the electric contacts thus obtained are superior in mechanical property (sufficient bonding strength), electrical property (conductive property and low contact resistance), resistance to environmental conditions (impediment to oxidization), and physical property (limitation of rise of solder due to capillary action).

Abstract translation: 当电接触被焊接到铜箔上以从其延伸时，防止焊料上升到电接点的一部分的方法。 该部分镀有贵金属并适于接触配对物体。 冷却装置与适于与配合对象接触的至少电触头的部分接触，并且电接触和铜箔之间的连接部分被加热装置加热。 可以防止焊料的上升，从而获得的机械性能（足够的接合强度），电性能（导电性和接触电阻低），耐环境条件（阻碍氧化）和物理性能（限制） 由于毛细作用引起的焊料的上升）。

公开(公告)号：US07445141B2

公开(公告)日：2008-11-04

申请号：US10711501

申请日：2004-09-22

Applicant: Glenn G. Daves ,  David L. Edwards ,  Mukta G. Farooq ,  Frank L. Pompeo

Inventor： Glenn G. Daves ,  David L. Edwards ,  Mukta G. Farooq ,  Frank L. Pompeo

IPC: B23K31/02

CPC classification number: B23K3/0638 ,  B23K2101/40 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/15311 ,  H05K3/301 ,  H05K3/303 ,  H05K3/305 ,  H05K2201/0209 ,  H05K2201/09909 ,  H05K2201/10234 ,  H05K2201/10734 ,  H05K2201/10977 ,  H05K2201/2018 ,  H05K2201/2036 ,  Y02P70/613 ,  Y10T29/49144 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A method for assembling, and the resultant electronic module, includes attaching a chip to a substrate using a first solder interconnection array, and attaching a board to the substrate using a second solder interconnection array, which may be a single-melt or a dual-melt solder array. The second solder interconnection array resides entirely within a space defined between the board and substrate. A creep resistant structure is provided within this space for maintaining the defined space and optimizing integrity of the second solder interconnection array. The creep resistant structure may include an underfill material, balls, brackets, frames, collars or combinations thereof. Wherein the creep resistant structure is an underfill material, it is crucial that the substrate be attached to the board before either entirely encapsulating the second interconnection array with underfill material, or partially encapsulating the second solder interconnection array at discrete locations with underfill material.

Abstract translation: 一种用于组装的方法，并且所得到的电子模块包括使用第一焊料互连阵列将芯片附接到衬底，并且使用第二焊料互连阵列将衬底附接到衬底，第二焊料互连阵列可以是单熔体或双 - 熔融焊料阵列。 第二焊料互连阵列完全位于限定在板和衬底之间的空间内。 在该空间内设有抗蠕变结构，用于维持限定的空间并优化第二焊料互连阵列的完整性。 抗蠕变结构可以包括底部填充材料，球，支架，框架，套环或其组合。 其中抗蠕变结构是底部填充材料，在将基板完全用底部填充材料完全封装第二互连阵列之前，或者在具有底部填充材料的不连续位置部分地封装第二焊料互连阵列之前，衬底附着到板上是至关重要的。

公开(公告)号：US07387910B2

公开(公告)日：2008-06-17

申请号：US11403538

申请日：2006-04-13

Applicant: Woong-Sun Lee ,  Jin Yu

Inventor： Woong-Sun Lee ,  Jin Yu

IPC: H01L21/50 ,  H01L21/48 ,  H01L21/44 ,  H01L23/52 ,  H01L23/48 ,  H01L23/40

CPC classification number: H01L24/13 ,  H01L24/02 ,  H01L24/06 ,  H01L24/11 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/0603 ,  H01L2224/13099 ,  H01L2224/132 ,  H01L2224/13287 ,  H01L2224/1329 ,  H01L2224/136 ,  H01L2224/1403 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/00 ,  H01L2924/0001 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/014 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/0212 ,  H05K2201/094 ,  H05K2201/10234 ,  H05K2201/10674 ,  H05K2203/041 ,  H05K2203/043 ,  Y02P70/613 ,  H01L2924/00014

Abstract: Disclosed herein is a method of bonding solder pads of a flip-chip package. This invention relates to a method of bonding solder pads having different sizes to each other, when a bonding operation is executed between a chip and a PCB, between chips, or between PCBs. On a side having a larger solder pad, a general solder ball is used. Conversely, on a side having a smaller solder pad, a solder ball having a core is used. The core serves to maintain a predetermined interval between the chip and the PCB or between the chips, after the bonding operation has been completed. The solder bonded parts are aligned with each other so as to perform a final bonding operation. In a conventional flip-chip package, solder pads provided on a bonded part must have the same or similar size. According to this invention, even if the size difference between the solder pads is large, bonding is possible, thus ensuring electrical and mechanical reliability.

Abstract translation: 这里公开了一种焊接倒装芯片封装的焊盘的方法。 本发明涉及当在芯片和PCB之间，芯片之间或PCB之间执行接合操作时，将彼此不同尺寸的焊盘焊接的方法。 在具有较大焊盘的一侧，使用一般的焊球。 相反，在具有较小焊盘的一侧使用具有芯的焊球。 芯片用于在焊接操作完成之后保持芯片和PCB之间或芯片之间的预定间隔。 焊接接合部彼此对准，以进行最终接合操作。 在传统的倒装芯片封装中，设置在接合部件上的焊盘必须具有相同或相似的尺寸。 根据本发明，即使焊盘之间的尺寸差大，也可以进行接合，从而确保电气和机械的可靠性。