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    LAMINATED CERAMIC ELECTRONIC COMPONENT AND MANUFACTURING METHOD THEREFOR
    105.
    发明申请
    LAMINATED CERAMIC ELECTRONIC COMPONENT AND MANUFACTURING METHOD THEREFOR 审中-公开
    层压陶瓷电子元件及其制造方法

    公开(公告)号：US20090139759A1

    公开(公告)日：2009-06-04

    申请号：US10596097

    申请日：2005-11-24

    Applicant: Mitsuru Ueda ,  Masaharu Ikeda

    Inventor： Mitsuru Ueda ,  Masaharu Ikeda

    IPC: H05K1/11 ,  B32B38/14

    CPC classification number: H05K1/116 ,  H01F17/0013 ,  H01F2017/002 ,  H05K1/0306 ,  H05K1/165 ,  H05K3/4061 ,  H05K3/4614 ,  H05K3/4629 ,  H05K2201/09454 ,  Y10T156/10

    Abstract: A laminated ceramic electronic component includes a plurality of ceramic green sheets. In each of the ceramic green sheets, which are not backed with a carrier film, coil conductor patterns and lead-out electrodes are formed by a screen printing method and simultaneously a conductive paste is filled in holes for via holes to form via holes. The coil conductor patterns include first lands provided at one end of the coil conductor patterns so as to cover the via holes for connection between layers and second lands to be connected to the via holes provided at the other end of the conductive patterns. The second lands are larger in diameter than the first lands, such that the area of the second lands is about 1.10 to about 2.25 times as wide as the area of the first lands.

    Abstract translation: 层叠陶瓷电子部件包括多个陶瓷生片。 在未被载体膜支撑的陶瓷生片中，通过丝网印刷法形成线圈导体图案和引出电极，同时将导电膏填充到通孔用孔中，形成通孔。 线圈导体图案包括设置在线圈导体图案的一端处的第一平台，以覆盖用于连接到导电图案的另一端处的通孔之间的用于层间和第二平台之间连接的通孔。 第二焊盘的直径大于第一焊盘，使得第二焊盘的面积比第一焊盘的面积大约为1.10至2.25倍。

    MULTI-LAYER PRINTED WIRING BOARD AND MANUFACTURING METHOD THEREOF
    107.
    发明申请
    MULTI-LAYER PRINTED WIRING BOARD AND MANUFACTURING METHOD THEREOF 有权
    多层印刷接线板及其制造方法

    公开(公告)号：US20080060840A1

    公开(公告)日：2008-03-13

    申请号：US11832892

    申请日：2007-08-02

    Applicant: Youhong WU

    Inventor： Youhong WU

    IPC: H01R12/06 ,  H05K3/46

    CPC classification number: H05K1/115 ,  H01L2224/16225 ,  H01L2924/15311 ,  H05K3/4602 ,  H05K2201/0347 ,  H05K2201/0352 ,  H05K2201/09454 ,  H05K2201/09509 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09627 ,  Y10T29/49165

    Abstract: A multi-layer printed wiring board has a core substrate, a throughhole structure, a first interlayer insulation layer, a first via, a second interlayer insulation layer and a second via. The core substrate has a throughhole opening, and the throughhole structure is formed in the throughhole opening. The first interlayer insulation layer is formed over the core substrate. The first via is formed in the first interlayer insulation layer and has a bottom portion having a first radius. The second interlayer insulation layer is formed over the first interlayer insulation layer and the first via. The second via is formed in the second interlayer insulation layer and has a bottom portion having a second radius greater than the first radius. The first via is positioned inside a circle having a radius (D1) from a gravity center of the throughhole opening, and the radius (D1) of the circle satisfies a formula, (D1)=(R)+(r)/3, where (R) represents a radius of the throughhole opening and (r) represents the first radius of the first via.

    Abstract translation: 多层印刷电路板具有核心基板，通孔结构，第一层间绝缘层，第一通孔，第二层间绝缘层和第二通孔。 核心基板具有通孔开口，并且通孔结构形成在通孔开口中。 在芯基板上形成第一层间绝缘层。 第一通孔形成在第一层间绝缘层中，并且具有第一半径的底部。 第二层间绝缘层形成在第一层间绝缘层和第一通孔之上。 第二通孔形成在第二层间绝缘层中，并且具有大于第一半径的第二半径的底部。 第一通孔位于从通孔开口重心的半径（D1）的圆内，圆的半径（D1）满足式（D1）=（R）+（r）/ 3， 其中（R）表示通孔开口的半径，（r）表示第一通孔的第一半径。

    Process and system for quality management and analysis of via drilling
    108.
    发明申请
    Process and system for quality management and analysis of via drilling 有权
    通孔钻孔质量管理与分析流程与系统

    公开(公告)号：US20080011715A1

    公开(公告)日：2008-01-17

    申请号：US11484531

    申请日：2006-07-11

    Applicant: Hisashi Matsumoto ,  Mark Singer ,  Leo Baldwin ,  Jeffrey E. Howerton ,  David V. Childers

    Inventor： Hisashi Matsumoto ,  Mark Singer ,  Leo Baldwin ,  Jeffrey E. Howerton ,  David V. Childers

    IPC: G01L21/30 ,  B44C1/22

    CPC classification number: H05K3/0035 ,  B23K26/03 ,  B23K26/06 ,  B23K26/389 ,  B23K2101/42 ,  H05K1/0269 ,  H05K2201/09454 ,  H05K2203/163

    Abstract: A process for laser forming a blind via in at least one layer of a circuit substrate having a plurality of capture pads of varying geometry can include, for at least one blind via to be formed in at least one layer of a circuit substrate, evaluating a capture pad geometry value (such as area and/or volume) within a predetermined distance from a drilling location with respect to a blind via geometry value (such as area and/or volume) to be formed at the drilling location. The process can include setting at least one laser operating parameter based on the evaluation in order to obtain a desired capture pad appearance after blind via formation. The process can include imaging a capture pad area defined as an area within a predetermined distance from a blind via drilling location in at least one layer of a circuit substrate, quantifying at least one appearance value for the imaged capture pad area, and determining an acceptability of the imaged capture pad areas based on the quantified appearance value.

    Abstract translation: 用于在具有多个不同几何形状的多个捕获垫的电路基板的至少一层中激光形成盲通孔的方法可以包括：至少一个盲孔以形成在电路基板的至少一层中， 相对于在钻孔位置处形成的盲孔通孔几何值（例如面积和/或体积），距离钻孔位置预定距离内的捕获垫几何值（例如面积和/或体积）。 该过程可以包括基于评估设置至少一个激光操作参数，以便在盲通孔形成之后获得期望的捕获垫外观。 该过程可以包括将被定义为距电路基板的至少一层中的盲孔通孔位置的预定距离范围内的捕获区域成像，量化成像捕获区域的至少一个出现值，以及确定可接受性 基于量化外观值的成像捕获垫区域。

    Systems and methods for blocking microwave propagation in parallel plate structures utilizing cluster vias
    109.
    发明申请
    Systems and methods for blocking microwave propagation in parallel plate structures utilizing cluster vias 失效
    利用簇通孔在平行板结构中阻挡微波传播的系统和方法

    公开(公告)号：US20070018757A1

    公开(公告)日：2007-01-25

    申请号：US11524112

    申请日：2006-09-19

    Applicant: William McKinzie

    Inventor： William McKinzie

    IPC: H01P7/00

    CPC classification number: H01G4/35 ,  H01L23/66 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01P1/16 ,  H01P1/2005 ,  H01P1/211 ,  H05K1/0216 ,  H05K1/0219 ,  H05K1/0222 ,  H05K1/0237 ,  H05K1/0239 ,  H05K1/115 ,  H05K1/116 ,  H05K1/162 ,  H05K3/429 ,  H05K2201/09454 ,  H05K2201/09536 ,  H05K2201/09618 ,  H05K2201/09672 ,  H05K2201/09809 ,  H01L2924/00

    Abstract: Systems and methods are taught for blocking the propagation of electromagnetic waves in parallel-plate waveguide (PPW) structures. Periodic arrays of resonant vias are used to create broadband high frequency stop bands in the PPW, while permitting DC and low frequency waves to propagate. Particular embodiments include clusters of small vias that effectively function as one large via, thereby increasing stop band bandwidth and maximizing parallel plate capacitance. Cluster vias can be configured to additionally provide a shielded and impedance matched route within the interior area of the cluster through which signal vias can connect transmission lines disposed in planes lying above and below the PPW. Important applications include electromagnetic noise reduction in layered electronic devices such as circuit boards, ceramic modules, and semiconductor chips.

    Abstract translation: 教导系统和方法阻止平行板波导（PPW）结构中电磁波的传播。 谐振通孔的周期阵列用于在PPW中产生宽带高频阻带，同时允许DC和低频波传播。 具体实施例包括有效地用作一个大通孔的小通孔簇，从而增加阻带带宽并最大化平行板电容。 集群通孔可以被配置为在簇的内部区域内另外提供屏蔽和阻抗匹配的路由，信号通孔可以通过该通孔连接布置在PPW上方和下方的平面中的传输线。 重要的应用包括诸如电路板，陶瓷模块和半导体芯片的分层电子设备中的电磁降噪。

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