公开(公告)号：US08431834B2

公开(公告)日：2013-04-30

申请号：US12485375

申请日：2009-06-16

Applicant: Craig Twardy ,  Robert McDonald

Inventor： Craig Twardy ,  Robert McDonald

IPC: H05K1/11

CPC classification number: H05K3/0047 ,  G01R31/024 ,  H05K1/0245 ,  H05K1/0251 ,  H05K1/0268 ,  H05K1/116 ,  H05K3/429 ,  H05K2201/09454 ,  H05K2201/09627 ,  H05K2201/09636 ,  H05K2201/09718 ,  H05K2201/09781 ,  H05K2203/0207 ,  H05K2203/0242 ,  H05K2203/175 ,  Y10T29/49117

Abstract: A method is disclosed for fabricating a PCB so that is can easily be determined if a via in the PCB has not been counterbored to a desired depth. A PCB fabricated according to the method also is disclosed.

Abstract translation: 公开了一种用于制造PCB的方法，使得如果PCB中的通孔没有被吸入到期望的深度，则可以容易地确定。 公开了根据该方法制造的PCB。

公开(公告)号：US20130069250A1

公开(公告)日：2013-03-21

申请号：US13671727

申请日：2012-11-08

Applicant: Roden Topacio ,  Adam Zbrzezny

Inventor： Roden Topacio ,  Adam Zbrzezny

IPC: H01L23/48 ,  H01L21/50

CPC classification number: H01L23/3128 ,  H01L23/16 ,  H01L23/562 ,  H01L2224/131 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/3511 ,  H05K1/0271 ,  H05K3/3452 ,  H05K3/3457 ,  H05K2201/09136 ,  H05K2201/09781 ,  H05K2203/043 ,  H01L2924/014 ,  H01L2924/00014

Abstract: Various semiconductor chip package substrates with reinforcement and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes providing a package substrate that has a first side and a second side opposite to the first side. The first side has a central area adapted to receive a semiconductor chip. A solder reinforcement structure is formed on the first side of the package substrate outside of the central area to resist bending of the package substrate.

Abstract translation: 公开了具有增强的各种半导体芯片封装基板及其制造方法。 一方面，提供一种制造方法，其包括提供具有第一侧和与第一侧相对的第二侧的封装基板。 第一侧具有适于接收半导体芯片的中心区域。 在中心区域外部的封装基板的第一侧上形成焊料增强结构，以抵抗封装基板的弯曲。

公开(公告)号：US08398214B2

公开(公告)日：2013-03-19

申请号：US12392270

申请日：2009-02-25

Applicant: Katsuhiro Okubo

Inventor： Katsuhiro Okubo

IPC: B41J2/045

CPC classification number: B41J2/14233 ,  B41J2002/14491 ,  H05K3/323 ,  H05K3/361 ,  H05K2201/09063 ,  H05K2201/09781 ,  H05K2201/10484

Abstract: There is provided a liquid ejecting head including a channel forming member in which a pressure generating chamber is provided, a piezoelectric element that is provided at one surface side of the channel forming member, a terminal portion electrically connected to the piezoelectric element; the terminal portion being provided at the one surface side of the channel forming member, a wiring substrate which has a wiring layer, and an adhesive layer for electrically connecting the wiring layer and the terminal portion and for combing the wiring substrate and the channel forming member, the adhesive layer being formed by an anisotropic conductive material. A gap layer that is electrically discontinuous with the terminal portion and the wiring layer is provided on at least one surface of the channel forming member and the wiring substrate in an area in which the adhesive layer is provided.

Abstract translation: 提供了一种液体喷射头，其包括设置有压力发生室的通道形成构件，设置在通道形成构件的一个表面侧的压电元件，电连接到压电元件的端子部分; 所述端子部分设置在所述沟道形成构件的一个表面侧，具有布线层的布线基板和用于电连接所述布线层和所述端子部分并用于梳理所述布线基板和所述沟道形成构件的粘合剂层 ，粘合剂层由各向异性导电材料形成。 在设置有粘合剂层的区域中，在沟道形成构件和布线基板的至少一个表面上设置与端子部和布线层不连续的间隙层。

公开(公告)号：US08395055B2

公开(公告)日：2013-03-12

申请号：US12289181

申请日：2008-10-22

Applicant: Hirotoshi Iguchi ,  Tetsuya Ohsawa

Inventor： Hirotoshi Iguchi ,  Tetsuya Ohsawa

IPC: H05K1/11

CPC classification number: H05K3/303 ,  G11B5/486 ,  H05K1/056 ,  H05K2201/09554 ,  H05K2201/09781 ,  H05K2201/10727 ,  H05K2201/2036 ,  Y02P70/613

Abstract: A suspension board with circuit includes a slider mounting portion provided with three pedestals arranged in mutually spaced apart relation for supporting a slider on which a magnetic head is mounted.

公开(公告)号：US08389869B2

公开(公告)日：2013-03-05

申请号：US12554340

申请日：2009-09-04

Applicant: Ko-Wei Lin

Inventor： Ko-Wei Lin

IPC: H05K1/11

CPC classification number: H05K1/111 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49838 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/15311 ,  H05K3/3452 ,  H05K2201/09781 ,  H05K2201/0989 ,  H05K2201/10734 ,  Y02P70/611 ,  H01L2924/00

Abstract: A circuit board including a substrate, a conductive pattern and a solder mask layer is provided. The conductive pattern includes a pad, a tail trace and a signal trace. The tail trace connects with the edge of the pad and the signal trace connects with the edge of the pad. An angle between a portion of the signal trace neighboring the pad and the tail trace is larger than 0 degree and smaller than 180 degree. The solder mask layer is disposed on the substrate and covers a portion of conductive pattern. The solder mask layer has an opening exposing the whole pad.

Abstract translation: 提供了包括基板，导电图案和焊料掩模层的电路板。 导电图案包括垫，尾迹和信号迹线。 尾迹与焊盘的边缘相连，信号迹线与焊盘的边缘相连。 与焊盘相邻的信号迹线的一部分与尾迹之间的角度大于0度且小于180度。 焊接掩模层设置在基板上并覆盖导电图案的一部分。 焊接掩模层具有暴露整个焊盘的开口。

公开(公告)号：US08385858B2

公开(公告)日：2013-02-26

申请号：US12854015

申请日：2010-08-10

Applicant: Jiangyi Guo ,  Pinghua He

Inventor： Jiangyi Guo ,  Pinghua He

IPC: H04B1/04

CPC classification number: H05K1/024 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/181 ,  H05K1/021 ,  H05K1/0243 ,  H05K1/025 ,  H05K1/113 ,  H05K1/182 ,  H05K3/0061 ,  H05K2201/09745 ,  H05K2201/09781 ,  H05K2201/10166 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A power amplifier and a signal transmitting system using the power amplifier are disclosed. The power amplifier includes a circuit board, a power amplifier, and a structural component. The circuit board is fixed on the structural component. The power amplifier is fixed on the circuit board or the structural component. A grounding reference layer is set on the structural component. A pair of pins is set on the power amplifier. A pair of housing portions is set between the circuit board and the structural component. Overhead matching areas are set face to face with the housing portions on the circuit board respectively. Power amplification matching portions are set face to face with the reference layer on the matching areas respectively. The pins are electrically connected to the power amplification matching portions respectively.

Abstract translation: 公开了功率放大器和使用功率放大器的信号传输系统。 功率放大器包括电路板，功率放大器和结构部件。 电路板固定在结构部件上。 功率放大器固定在电路板或结构部件上。 在结构部件上设置接地参考层。 功率放大器上设置一对引脚。 一对壳体部分设置在电路板和结构部件之间。 架空匹配区域分别与电路板上的壳体部分面对面设置。 功率放大匹配部分分别与匹配区域上的参考层面对面设置。 引脚分别电连接到功率放大匹配部分。

公开(公告)号：US20130026530A1

公开(公告)日：2013-01-31

申请号：US13343141

申请日：2012-01-04

Applicant: Eui Geun JUN

Inventor： Eui Geun JUN

IPC: H01L33/62

CPC classification number: G09F13/22 ,  G09F2013/222 ,  H01L33/62 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H05K1/111 ,  H05K2201/09781 ,  H05K2201/0979 ,  H05K2201/10106 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Disclosed is a light emitting device module including a package body, a first lead frame and a second lead frame provided on the package body, a light emitting device electrically connected to the first lead frame and the second lead frame, a first pad and a second pad respectively formed on the lower surfaces of the first lead frame and the second lead frame, and a third pad formed on the lower surface of the package body, wherein at least one of the first pad, the second pad and the third pad includes a plurality of sub-pads.

Abstract translation: 公开了一种发光器件模块，包括封装主体，设置在封装主体上的第一引线框架和第二引线框架，电连接到第一引线框架和第二引线框架的发光器件，第一焊盘和第二引线框架 分别形成在第一引线框架和第二引线框架的下表面上的第一焊盘和形成在封装主体的下表面上的第三焊盘，其中第一焊盘，第二焊盘和第三焊盘中的至少一个包括 多个子垫。

公开(公告)号：US20130000956A1

公开(公告)日：2013-01-03

申请号：US13616174

申请日：2012-09-14

Applicant: Yoshiyuki ISHIDA ,  Sadao Matsushima ,  Toshihide Fukuchi

Inventor： Yoshiyuki ISHIDA ,  Sadao Matsushima ,  Toshihide Fukuchi

IPC: H05K1/02

CPC classification number: H01L23/66 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/552 ,  H01L23/642 ,  H01L2223/6616 ,  H01L2223/6627 ,  H01L2223/6677 ,  H01L2924/0002 ,  H05K1/0216 ,  H05K1/0218 ,  H05K1/024 ,  H05K1/0243 ,  H05K1/0251 ,  H05K1/115 ,  H05K2201/0187 ,  H05K2201/0367 ,  H05K2201/093 ,  H05K2201/09718 ,  H05K2201/09781 ,  H05K2201/09854 ,  H05K2201/10098 ,  H01L2924/00

Abstract: A high-frequency circuit board capable of easily forming a bias line whose resonance frequency is sufficiently separated from operating frequency is provided. On a high-frequency circuit board 100, by electrically connecting a bias line 11 to a high-frequency circuit 10 using blind via holes 106 and 107, it is possible to limit the route that has a possibility of producing resonance only to the bias line connecting the ends 106a and 107a of the blind via holes 106 and 107 to the bias line 11. By adjusting the route length from the end 106a to the end 107a, it is possible to prevent production of resonance in the vicinity of the operating frequency.

Abstract translation: 提供了能够容易地形成谐振频率与工作频率充分分离的偏置线的高频电路基板。 在高频电路板100上，通过使用盲通孔106和107将偏置线11与高频电路10进行电连接，可以限制仅具有产生谐振的可能性的路径到偏置线 将盲孔106和107的端部106a和107a连接到偏置线11.通过调整从端部106a到端部107a的路线长度，可以防止在工作频率附近产生谐振。

公开(公告)号：US20120312590A1

公开(公告)日：2012-12-13

申请号：US13490850

申请日：2012-06-07

Applicant: Shinnosuke MAEDA ,  Hajime SAIKI ,  Satoshi HIRANO

Inventor： Shinnosuke MAEDA ,  Hajime SAIKI ,  Satoshi HIRANO

IPC: H05K1/11 ,  H05K3/10

CPC classification number: H05K3/4007 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/49822 ,  H01L23/544 ,  H01L2221/68331 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2223/54406 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54433 ,  H01L2223/54486 ,  H01L2224/16225 ,  H01L2924/19105 ,  H05K1/0269 ,  H05K1/113 ,  H05K3/4602 ,  H05K3/4682 ,  H05K2201/09781 ,  H05K2203/072 ,  H05K2203/1105 ,  Y10T29/49155

Abstract: Disclosed is a method of manufacturing a multilayer wiring substrate having a principal plane of the substrate and a rear plane thereof, having a structure such that a plurality of resin insulating layers and a plurality of conductor layers are laminated, and a plurality of chip component connecting terminals to which chip components are connectable are disposed on the principal plane of the substrate. This method has a feature including a plating layer forming process in which product plating layers which provide the plurality of chip component connecting terminals and a dummy plating layer on the surrounding of the product plating layers are formed on the surface of an exposed outermost resin insulating layer at the principal plane of the substrate. This method permits a thickness dispersion of the chip component connecting terminals to be suppressed and permits a connection reliability thereof to the chip components to be increased.

Abstract translation: 公开了一种多层布线基板的制造方法，该多层布线基板具有基板的主面及其背面，具有层叠多个树脂绝缘层和多个导体层的结构，并且多个芯片部件连接 芯片部件可连接的端子设置在基板的主平面上。 该方法具有包括镀层形成工艺的特征，其中在露出的最外层树脂绝缘层的表面上形成了在产品镀层周围形成有多个芯片部件连接端子和虚拟镀层的产品镀层 在基板的主平面上。 该方法能够抑制芯片部件连接端子的厚度分散，并且能够提高芯片部件的连接可靠性。

公开(公告)号：US08327535B2

公开(公告)日：2012-12-11

申请号：US13317108

申请日：2011-10-11

Applicant: Yasunari Ooyabu ,  Jun Ishii ,  Kensuke Nishi

Inventor： Yasunari Ooyabu ,  Jun Ishii ,  Kensuke Nishi

IPC: H05K3/10

CPC classification number: H05K1/0269 ,  G11B5/486 ,  H05K1/056 ,  H05K3/0052 ,  H05K3/242 ,  H05K3/243 ,  H05K3/28 ,  H05K3/4644 ,  H05K2201/09063 ,  H05K2201/0909 ,  H05K2201/09127 ,  H05K2201/09781 ,  H05K2203/163 ,  Y10T29/49124 ,  Y10T29/49165 ,  Y10T428/24331

Abstract: A wired circuit board has a metal supporting board, a metal foil formed on the metal supporting board, an insulating base layer formed on the metal supporting board to cover the metal foil, and a conductive pattern formed on the insulating base layer and a having a terminal portion. An opening is formed in the insulating base layer to expose the metal foil.

Abstract translation: 布线电路板具有金属支撑板，形成在金属支撑板上的金属箔，形成在金属支撑板上以覆盖金属箔的绝缘基底层，以及形成在绝缘基底层上的导电图案， 端子部分。 在绝缘基底层中形成开口以露出金属箔。