公开(公告)号：US11879049B2

公开(公告)日：2024-01-23

申请号：US17293264

申请日：2018-11-15

Applicant: KYOCERA Corporation

Inventor： Satoshi Kajita ,  Yasuhide Tami

IPC: B32B3/10 ,  C08K13/02 ,  B32B15/08 ,  B32B27/20 ,  C08L45/00 ,  C09K21/08 ,  H01B3/00 ,  H01B3/30 ,  H05K1/03 ,  C08K3/36 ,  C08K5/03 ,  C08K5/14

CPC classification number: C08K13/02 ,  B32B15/08 ,  B32B27/20 ,  C08L45/00 ,  C09K21/08 ,  H01B3/002 ,  H01B3/307 ,  H05K1/0373 ,  B32B2307/3065 ,  B32B2457/08 ,  C08K3/36 ,  C08K5/03 ,  C08K5/14 ,  C08K2201/005 ,  C08L2201/02 ,  C08L2203/30 ,  C08L2205/025 ,  H05K2201/012 ,  H05K2201/0129 ,  H05K2201/0158 ,  H05K2201/0209 ,  H05K2201/0266

Abstract: A flame retardant is included in a resin phase, and the flame retardant has a maximum number frequency in a range of 1 μm or less when a particle size distribution is evaluated by dividing a particle size into 1 μm increments. The resin phase includes inorganic particles, and the inorganic particles have a maximum number frequency in a range of 0.5 μm or less when the particle size distribution is evaluated by dividing the particle size into 0.5 μm increments. The flame retardant has an average particle size larger than the average particle size of inorganic particles. The number frequency of the flame retardant and the inorganic particles, respectively, decreases with increasing the particle size.

公开(公告)号：US20230180386A1

公开(公告)日：2023-06-08

申请号：US18061555

申请日：2022-12-05

Applicant: IBIDEN CO., LTD.

Inventor： Naoki MIZUTANI ,  Akifumi SHIKANO

IPC: H05K1/11

CPC classification number: H05K1/113 ,  H05K2201/09563 ,  H05K2201/0266

Abstract: A wiring substrate includes a first conductor pattern, a second conductor pattern, an insulating layer interposed between the first and second patterns and having a through hole, and a plating conductor integrally formed with the second pattern and filling the through hole in the insulating layer such that the plating conductor is in contact with the first pattern. The through hole has an expansion part such that an opening width of the through hole on the first pattern side is widened, and the plating conductor includes a first plating film directly formed on inner wall of the through hole and a second plating film formed on the first plating film such that the minimum thickness of the first plating film in the expansion part is in the range of 55% to 95% of the minimum thickness of the first plating film in the through hole other than the expansion part.

公开(公告)号：US09877387B2

公开(公告)日：2018-01-23

申请号：US14779232

申请日：2014-03-26

Applicant: KYOCERA Corporation

Inventor： Satoshi Kajita ,  Mitsuhiro Hagihara ,  Yuuhei Matsumoto

IPC: H05K7/00 ,  H05K1/03 ,  H05K1/11 ,  H05K3/42 ,  H05K1/02 ,  H05K1/09 ,  H05K1/18 ,  H05K3/46 ,  H05K3/00

CPC classification number: H05K1/0306 ,  H05K1/0298 ,  H05K1/036 ,  H05K1/09 ,  H05K1/115 ,  H05K1/181 ,  H05K3/0038 ,  H05K3/421 ,  H05K3/4602 ,  H05K3/4655 ,  H05K2201/0116 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/0266 ,  H05K2201/09845 ,  H05K2201/09854 ,  H05K2201/09863 ,  H05K2201/2072

Abstract: A wiring board includes: an inorganic insulating layer having a via hole formed so as to penetrate the inorganic insulating layer in a thickness direction thereof; a conductive layer disposed on the inorganic insulating layer; and a via conductor which adheres to an inner wall of the via hole and is connected with the conductive layer. The inorganic insulating layer includes a first section including a plurality of inorganic insulating particles partly connected to each other, and a resin portion located in gaps between the inorganic insulating particles, and a second section which is interposed between the first section and the via conductor, including a plurality of inorganic insulating particles partly connected to each other, and a conducting portion composed of part of the via conductor which is located in gaps between the inorganic insulating particles.

公开(公告)号：US09526168B2

公开(公告)日：2016-12-20

申请号：US14719440

申请日：2015-05-22

Applicant: IBIDEN CO., LTD.

Inventor： Youhong Wu

IPC: H05K1/02 ,  H05K1/03 ,  H01L23/12 ,  H05K3/46 ,  H05K3/34

CPC classification number: H05K1/036 ,  H01L21/4857 ,  H01L23/12 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K1/0298 ,  H05K3/3436 ,  H05K3/4644 ,  H05K3/4673 ,  H05K2201/0191 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/0266 ,  H05K2203/066 ,  Y10T29/49156 ,  H01L2924/00

Abstract: A printed wiring board includes an inner conductive-circuit layer, an insulation layer structure including a first insulation layer laminated on inner conductive-circuit layer and a second insulation layer laminated on the first insulation layer, and an outermost conductive-circuit layer laminated on the insulation layer structure and including connection portions such that the connection portions are positioned to mount a component on the insulation layer structure. The second insulation layer is interposed between the first insulation layer and the outermost conductive-circuit layer and has a thickness which is smaller than a thickness of the first insulation layer such that an outer surface of the second insulation layer on an outermost conductive-circuit-layer side is flatter than an inner surface of the second insulation layer on a first insulation-layer side.

Abstract translation: 印刷电路板包括内部导电电路层，绝缘层结构，其包括层叠在内部导电电路层上的第一绝缘层和层叠在第一绝缘层上的第二绝缘层，以及层叠在第一绝缘层上的最外部导电电路层 绝缘层结构，并且包括连接部分，使得连接部分定位成将部件安装在绝缘层结构上。 第二绝缘层插入在第一绝缘层和最外面的导电电路层之间，其厚度小于第一绝缘层的厚度，使得最外面的导电电路层的第二绝缘层的外表面， 层侧比第一绝缘层侧的第二绝缘层的内表面平坦。

公开(公告)号：US20160242283A1

公开(公告)日：2016-08-18

申请号：US15029335

申请日：2014-10-29

Applicant: KYOCERA CORPORATION

Inventor： Katsura HAYASHI

IPC: H05K1/11 ,  H05K1/03

CPC classification number: H05K1/11 ,  H05K1/0306 ,  H05K1/0313 ,  H05K3/4673 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/0266 ,  H05K2201/0326 ,  H05K2201/068

Abstract: A wiring board excellent in electrical reliability is provided. A wiring board includes a first resin layer; an inorganic insulating layer disposed on the first resin layer; a second resin layer disposed on the inorganic insulating layer; and a conductive layer disposed on the second resin layer. The inorganic insulating layer has a first region located in a vicinity of the second resin layer and a second region located on a side opposite to a second resin layer side of the first region. A content ratio of second inorganic insulating particles in the first region is lower than a content ratio of second inorganic insulating particles in the second regions.

Abstract translation: 提供了电气可靠性优异的接线板。 布线基板包括第一树脂层; 设置在所述第一树脂层上的无机绝缘层; 设置在无机绝缘层上的第二树脂层; 以及设置在第二树脂层上的导电层。 无机绝缘层具有位于第二树脂层附近的第一区域和位于与第一区域的第二树脂层侧相反一侧的第二区域。 第一区域中的第二无机绝缘粒子的含有率低于第二区域中的第二无机绝缘粒子的含有比例。

公开(公告)号：US20160050750A1

公开(公告)日：2016-02-18

申请号：US14818109

申请日：2015-08-04

Applicant: The Board of Trustees of the University of Illinois

Inventor： John A. ROGERS ,  Xian HUANG

IPC: H05K1/02 ,  H05K3/46 ,  H05K1/11 ,  H05K1/18 ,  H05K1/03 ,  H05K1/09

CPC classification number: H05K1/0286 ,  A61B5/686 ,  H05K1/0212 ,  H05K1/0275 ,  H05K1/028 ,  H05K1/0283 ,  H05K1/0386 ,  H05K1/095 ,  H05K1/097 ,  H05K1/144 ,  H05K3/1216 ,  H05K3/207 ,  H05K3/22 ,  H05K3/285 ,  H05K3/287 ,  H05K3/288 ,  H05K3/4626 ,  H05K2201/0133 ,  H05K2201/0266 ,  H05K2201/041 ,  H05K2201/10083 ,  H05K2201/10098 ,  H05K2201/10151 ,  H05K2201/10196 ,  H05K2201/10212 ,  H05K2203/0271 ,  H05K2203/0292 ,  H05K2203/0514 ,  H05K2203/0769 ,  H05K2203/0776 ,  H05K2203/0786 ,  H05K2203/105 ,  H05K2203/1105 ,  H05K2203/1142 ,  H05K2203/175 ,  H05K2203/178 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/49124 ,  Y10T137/0318 ,  Y10T428/239

Abstract: The invention provides transient printed circuit board devices, including active and passive devices that electrically and/or physically transform upon application of at least one internal and/or external stimulus.

Abstract translation: 本发明提供瞬时印刷电路板装置，包括在应用至少一个内部和/或外部刺激时电和/或物理变换的有源和无源装置。

公开(公告)号：US20150342039A1

公开(公告)日：2015-11-26

申请号：US14719440

申请日：2015-05-22

Applicant: IBIDEN CO., LTD.

Inventor： Youhong WU

IPC: H05K1/03 ,  H05K1/02 ,  H05K3/46

CPC classification number: H05K1/036 ,  H01L21/4857 ,  H01L23/12 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K1/0298 ,  H05K3/3436 ,  H05K3/4644 ,  H05K3/4673 ,  H05K2201/0191 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/0266 ,  H05K2203/066 ,  Y10T29/49156 ,  H01L2924/00

Abstract: A printed wiring board includes an inner conductive-circuit layer, an insulation layer structure including a first insulation layer laminated on inner conductive-circuit layer and a second insulation layer laminated on the first insulation layer, and an outermost conductive-circuit layer laminated on the insulation layer structure and including connection portions such that the connection portions are positioned to mount a component on the insulation layer structure. The second insulation layer is interposed between the first insulation layer and the outermost conductive-circuit layer and has a thickness which is smaller than a thickness of the first insulation layer such that an outer surface of the second insulation layer on an outermost conductive-circuit-layer side is flatter than an inner surface of the second insulation layer on a first insulation-layer side.

Abstract translation: 印刷电路板包括内部导电电路层，绝缘层结构，其包括层叠在内部导电电路层上的第一绝缘层和层叠在第一绝缘层上的第二绝缘层，以及层叠在第一绝缘层上的最外部导电电路层 绝缘层结构，并且包括连接部分，使得连接部分定位成将部件安装在绝缘层结构上。 第二绝缘层插入在第一绝缘层和最外面的导电电路层之间，其厚度小于第一绝缘层的厚度，使得最外面的导电电路层的第二绝缘层的外表面， 层侧比第一绝缘层侧的第二绝缘层的内表面平坦。

公开(公告)号：US20150140293A1

公开(公告)日：2015-05-21

申请号：US14398616

申请日：2013-08-01

Applicant: Waseda University ,  Fuji Electric Co., Ltd.

Inventor： Yoshimichi Ohki ,  Yuichi Hirose ,  Genta Wada ,  Toshikatsu Tanaka ,  Kenji Okamoto

IPC: H05K1/05 ,  H05K1/09 ,  H05K1/02 ,  H05K1/03

CPC classification number: H05K1/056 ,  C09D7/67 ,  C09D7/68 ,  C09D7/69 ,  C09D163/00 ,  H05K1/0201 ,  H05K1/0204 ,  H05K1/0256 ,  H05K1/0373 ,  H05K1/09 ,  H05K2201/0209 ,  H05K2201/0266 ,  H05K2201/0769 ,  H05K2201/10106 ,  Y10T428/24893

Abstract: A highly thermally conductive printed circuit board prevents electrochemical migration by inhibiting elution of copper ions. The printed circuit board is a metal-base printed circuit board including a metal base plate having an insulating resin layer and a copper foil layer stacked thereon in this order. In the printed circuit board, the insulating resin layer contains a first inorganic filler made of inorganic particles having particle diameters of 0.1 nm to 600 nm with an average particle diameter (D50) of 1 nm to 300 nm, and a second inorganic filler made of inorganic particles having particle diameters of 100 nm to 100 μm with an average particle diameter (D50) of 500 nm to 20 μm, and the first inorganic filler and the second inorganic filler are uniformly dispersed in the insulating resin layer.

Abstract translation: 高导热性印刷电路板通过抑制铜离子的洗脱来防止电化学迁移。 印刷电路板是依次包括具有绝缘树脂层和铜箔层的金属基板的金属基印刷电路板。 在印刷电路板中，绝缘树脂层包含由平均粒径（D50）为1nm〜300nm的粒径为0.1nm〜600nm的无机粒子构成的第一无机填充材料和由 平均粒径（D50）为500nm〜20μm的粒径为100nm〜100μm的无机粒子，第一无机填充剂和第二无机填料均匀地分散在绝缘树脂层中。

公开(公告)号：US20150114707A1

公开(公告)日：2015-04-30

申请号：US14524894

申请日：2014-10-27

Applicant: Flextronics AP, LLC

Inventor： Michael James Glickman

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/09 ,  H05K3/00

CPC classification number: H05K1/0206 ,  H05K3/0094 ,  H05K2201/0257 ,  H05K2201/0266

Abstract: A method of and device for forming vias on an electronic board (such as a PCB board) comprises forming one or more holes on the electronic board, placing a nanomaterial inside the one or more holes, and forming one or more filled holes on the electronic board. The nanomaterial can be nanocopper, which can be either push/pull into the holes on the electronic board or a combination of push and pull. The push/pull can be performed by using a mechanical device or by a person. A capping layer can be on both side of the via. The vias formed by using the nanomaterials provides a high efficient vertical heat transferring path from one side of the electronic board to the other side of the electronic board.

Abstract translation: 在电子板（例如PCB板）上形成通孔的方法和装置包括在电子板上形成一个或多个孔，将纳米材料放置在一个或多个孔内，并在电子板上形成一个或多个填充孔 板。 纳米材料可以是纳米孔，其可以是推/拉入电子板上的孔或者推拉的组合。 推/拉可以通过使用机械装置或人员进行。 覆盖层可以在通孔的两侧。 通过使用纳米材料形成的通孔提供从电子板的一侧到电子板的另一侧的高效的垂直传热路径。

公开(公告)号：US08802996B2

公开(公告)日：2014-08-12

申请号：US13819080

申请日：2011-08-25

Applicant: Katsura Hayashi

Inventor： Katsura Hayashi

IPC: H05K1/11

CPC classification number: H05K1/115 ,  H05K1/18 ,  H05K3/4673 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/0266 ,  H05K2201/09827

Abstract: A wiring board according to an embodiment includes an inorganic insulating layer provided with a via-hole which is a penetrating hole, and a via-conductor which is a penetrating conductor disposed inside the via-hole. The inorganic insulating layer includes first inorganic insulating particles connected to each other and second inorganic insulating particles that are larger in particle size than the first inorganic insulating particles and are connected to each other via the first inorganic insulating particles, and also has, at an inner wall of the via-hole V, a protrusion including at least part of the second inorganic insulating particle. The protrusion is covered with the via-conductor.

Abstract translation: 根据实施例的布线板包括设置有穿孔的通孔的无机绝缘层和布置在通孔内的穿透导体的通孔导体。 无机绝缘层包括彼此连接的第一无机绝缘颗粒和与第一无机绝缘颗粒相比粒径大的第二无机绝缘颗粒，并且通过第一无机绝缘颗粒彼此连接，并且在内部 通孔V的壁，包括至少部分第二无机绝缘颗粒的突起。 突起被通孔导体覆盖。