公开(公告)号：US20020001981A1

公开(公告)日：2002-01-03

申请号：US09752116

申请日：2000-12-29

Inventor： E. C. Ong

IPC: H05K001/00 ,  H01R012/00 ,  H05K003/34

CPC classification number: H01L24/11 ,  H01L21/4853 ,  H01L23/49816 ,  H01L24/13 ,  H01L24/94 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11334 ,  H01L2224/1191 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/274 ,  H01L2224/45144 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K3/3436 ,  H05K2201/0379 ,  H05K2201/10977 ,  H05K2203/025 ,  Y02P70/613 ,  Y10T29/49144 ,  Y10T29/49149 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05099

Abstract: A method for providing electrical contact to pads on a surface of a device involves steps of adding a first contact extension to individual ones of the pads, covering the pads and contact extensions with a layer of protective material, removing a portion of the layer of protective material such that a portion of each of the contact extensions is exposed, and applying a second contact extension to individual ones of the exposed first contact extensions. The first extensions may be any of several different kinds, including wires or solder balls, and the protective material layer provides both protection from environmental effects and added lateral strength for the connection of the first extensions to the contact pads.

Abstract translation: 用于向装置的表面上的焊盘提供电接触的方法包括以下步骤：将第一接触延伸部分添加到各个焊盘，用一层保护材料覆盖焊盘和接触延伸部分，去除保护层的一部分 材料，使得每个接触延伸部分的一部分被暴露，以及将第二接触延伸部分施加到所暴露的第一接触延伸部中的各个。 第一延伸部可以是几种不同的种类，包括电线或焊球，并且保护材料层既提供了对第一延伸部与接触片的连接的环境影响和增加的侧向强度的保护。

公开(公告)号：US20010052423A1

公开(公告)日：2001-12-20

申请号：US09907971

申请日：2001-03-20

Inventor： Achyuta Achari ,  Andrew Zachary Glovatsky ,  Robert Edward Belke ,  Brenda Joyce Nation ,  Delin Li ,  Lakhi N. Goenka ,  Robert Joseph Gordon ,  Thomas Bernd Krautheim

IPC: H05K001/11

CPC classification number: H05K3/4038 ,  H05K3/0047 ,  H05K3/06 ,  H05K3/062 ,  H05K3/064 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/44 ,  H05K3/445 ,  H05K3/4608 ,  H05K3/4611 ,  H05K3/4623 ,  H05K3/4641 ,  H05K3/4685 ,  H05K2201/0305 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0379 ,  H05K2201/0397 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09563 ,  H05K2201/09609 ,  H05K2201/09845 ,  H05K2201/09881 ,  H05K2203/0369 ,  H05K2203/066 ,  H05K2203/0733 ,  H05K2203/1152 ,  H05K2203/1184 ,  H05K2203/1536 ,  Y10T29/49156

Abstract: A method for making a multi-layer electronic circuit board 136 having electroplated apertures 96, 98 which may be selectively and electrically isolated from an electrically grounded member 46 and further having selectively formed air bridges and/or crossover members 128 which are structurally supported by material 134.

Abstract translation: 一种用于制造具有电镀孔96,98的多层电子电路板136的方法，其可以与电接地构件46选择性地和电隔离，并且还具有结构上由材料支撑的选择性地形成的空气桥和/或交叉构件128 134。

公开(公告)号：US06311888B1

公开(公告)日：2001-11-06

申请号：US09544456

申请日：2000-04-07

Applicant: Yoshitsugu Funada ,  Rieka Ohuchi

Inventor： Yoshitsugu Funada ,  Rieka Ohuchi

IPC: B23K3102

CPC classification number: B32B27/08 ,  B32B27/20 ,  B32B2250/40 ,  H01L24/29 ,  H01L24/45 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/1134 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/29083 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/29386 ,  H01L2224/29499 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/73204 ,  H01L2224/83101 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2224/8385 ,  H01L2224/83851 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/09701 ,  H01L2924/15787 ,  H01L2924/351 ,  H05K3/323 ,  H05K2201/0209 ,  H05K2201/0212 ,  H05K2201/0379 ,  H05K2201/10674 ,  H05K2203/1189 ,  Y10T428/24942 ,  Y10T428/259 ,  Y10T428/31855 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/05442 ,  H01L2924/05432 ,  H01L2924/0503 ,  H01L2924/0504 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/48

Abstract: This invention provides a resin film preferably used for mounting a semiconductor chip on a substrate through flip-chip connection, and a method based on the use of such a resin film. The resin film has a laminated B/A/B structure where a first resin layer (A) having inorganic particles dispersed in an insulating resin is sandwiched by second and third resin layers (B) having no inorganic particles in their insulating resins. The method for connecting electronic parts comprises the steps of forming metal projections (bumps) on a plurality of connection terminals prepared on the surface of a first electronic part; preliminarily pressing the resin film against a plurality of connection terminal surfaces of the other electronic part; applying pressure onto the connection parts in the presence of heat after having properly aligned the metal projections of the first electronic part with the corresponding connection terminals of the other electronic part, thereby establishing electric connection and at the same time mechanical contact between the two electronic parts through the resin film melt and solidifying.

公开(公告)号：US20010035299A1

公开(公告)日：2001-11-01

申请号：US09815564

申请日：2001-03-23

Inventor： Achyuta Achari ,  Andrew Zachary Glovatsky ,  Robert Edward Belke ,  Brenda Joyce Nation ,  Delin Li ,  Lakhi N. Goenka ,  Mohan R. Paruchuri ,  Robert Joseph Gordon ,  Thomas Bernd Krautheim

IPC: H05K001/03

CPC classification number: H05K3/4038 ,  H05K3/0047 ,  H05K3/06 ,  H05K3/062 ,  H05K3/064 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/44 ,  H05K3/445 ,  H05K3/4608 ,  H05K3/4611 ,  H05K3/4623 ,  H05K3/4641 ,  H05K3/4685 ,  H05K2201/0305 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0379 ,  H05K2201/0397 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09563 ,  H05K2201/09609 ,  H05K2201/09845 ,  H05K2201/09881 ,  H05K2203/0369 ,  H05K2203/066 ,  H05K2203/0733 ,  H05K2203/1152 ,  H05K2203/1184 ,  H05K2203/1536 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T156/1056

Abstract: A method for making a multi-layer circuit board 116 having apertures 96, 98 which may be selectively and electrically isolated from electrically grounded member 46 and further having selectively formed air bridges and/or crossover members 104 which are structurally supported by material 112. Each of the apertures 96, 98 selectively receives electrically conductive material 114.

Abstract translation: 一种用于制造具有孔96,98的多层电路板116的方法，其可以与电接地构件46选择性地和电隔离，并且还具有在结构上由材料112支撑的选择性地形成的空气桥和/或交叉构件104.每个 孔96,98选择性地接收导电材料114。

公开(公告)号：US20010035298A1

公开(公告)日：2001-11-01

申请号：US09812963

申请日：2001-03-20

Inventor： Mohan R. Paruchuri

IPC: H05K001/03

CPC classification number: H05K3/44 ,  H05K3/0047 ,  H05K3/06 ,  H05K3/062 ,  H05K3/064 ,  H05K3/4038 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/445 ,  H05K3/4608 ,  H05K3/4611 ,  H05K3/4623 ,  H05K3/4641 ,  H05K3/4685 ,  H05K2201/0305 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0379 ,  H05K2201/0397 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09563 ,  H05K2201/09609 ,  H05K2201/09845 ,  H05K2201/09881 ,  H05K2203/0369 ,  H05K2203/066 ,  H05K2203/0733 ,  H05K2203/1152 ,  H05K2203/1184 ,  H05K2203/1536

Abstract: A method 10, 80, 81 for making multi-layer electronic circuit boards 77, 137, 139 having metallized apertures 18, 20, 34, 40, 104, 106, 120.

Abstract translation: 一种用于制造具有金属化孔18,20,34,40,104,106,120的多层电子电路板77,137,139的方法10,80,81。

公开(公告)号：US06245490B1

公开(公告)日：2001-06-12

申请号：US09506593

申请日：2000-02-18

Applicant: Jin Hyun Yoon ,  Gi Bum Park ,  In Pyo Hong ,  Yong Kim ,  Myung Kee Chung

Inventor： Jin Hyun Yoon ,  Gi Bum Park ,  In Pyo Hong ,  Yong Kim ,  Myung Kee Chung

IPC: G03F700

CPC classification number: H01L23/3107 ,  H01L23/3114 ,  H01L23/49833 ,  H01L24/48 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H05K1/113 ,  H05K3/064 ,  H05K3/244 ,  H05K3/4007 ,  H05K3/423 ,  H05K2201/0347 ,  H05K2201/0355 ,  H05K2201/0367 ,  H05K2201/0379 ,  H05K2201/0394 ,  H05K2201/09563 ,  H05K2203/0369 ,  H05K2203/0542 ,  Y10T29/49117 ,  Y10T29/49144 ,  Y10T29/49146 ,  Y10T29/49165 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/85399 ,  H01L2924/00012

Abstract: A first method of manufacturing a printed circuit board includes steps of (a) preparing a board which has a chip mounting area and circuit patterns on an upper surface and metal pads to be electrically connected to the circuit patterns on a lower surface, (b) attaching a metal plate to the lower surface of the board, (c) forming metal patterns on the metal pads by etching the metal plate, and (d) forming metal bumps by plating the metal patterns. A second method of manufacturing a circuit board, in this case a flexible circuit board, includes the steps of (a) preparing a board having Cu patterns, plated with a Au layer, attached to a lower surface of a polyimide tape, (b) forming a plurality of via holes in the polyimide tape, which expose the Cu patterns to the upper surface of the polyimide tape, (c) coating the upper surface of the polyimide tape with a photoresist, and exposing and developing the photoresist to form openings therein which expose the via holes, (d) plating walls, defining the openings and the via holes, with Cu, (e) removing remaining portions of the photoresist to produce Cu bumps, and (f) plating the bumps to protect the Cu. The printed circuit boards of the present invention have advantages in that they are not subject to a misalignment of the metal bumps with their underlying conductive pattern, and eliminate the need to use flux, thereby being environmentally friendly.

Abstract translation: 制造印刷电路板的第一种方法包括以下步骤：（a）制备具有芯片安装区域和上表面上的电路图案的板，以及与下表面上的电路图案电连接的金属焊盘;（b） 将金属板附着到板的下表面，（c）通过蚀刻金属板在金属焊盘上形成金属图案，（d）通过镀金属图案形成金属凸块。 制造电路板的第二种方法（在这种情况下为柔性电路板）包括以下步骤：（a）准备具有附着在聚酰亚胺胶带的下表面上的镀有Au层的Cu图案的板，（b） 在聚酰亚胺胶带中形成多个通孔，将Cu图案暴露于聚酰亚胺胶带的上表面，（c）用光致抗蚀剂涂覆聚酰亚胺胶带的上表面，并曝光和显影光致抗蚀剂以在其中形成开口 其暴露通孔，（d）用Cu限定开口和通孔的电镀壁，（e）除去光致抗蚀剂的剩余部分以产生Cu凸块，以及（f）电镀凸块以保护Cu。 本发明的印刷电路板的优点在于，它们不会使金属凸块与其下面的导电图案不对准，并且不需要使用助焊剂，因此是环境友好的。

公开(公告)号：US06233820B1

公开(公告)日：2001-05-22

申请号：US09002080

申请日：1997-12-31

Applicant: Edwin J. H. Hummelink

Inventor： Edwin J. H. Hummelink

IPC: H05K302

CPC classification number: H01P11/00 ,  H05K1/0219 ,  H05K3/0047 ,  H05K3/429 ,  H05K3/4614 ,  H05K2201/0379 ,  H05K2201/0715 ,  H05K2201/09536 ,  H05K2201/09718 ,  H05K2203/0207 ,  H05K2203/0242 ,  H05K2203/171 ,  H05K2203/175 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: Method for manufacturing a multilayer microwave board in one operation. Individually etched layers of a laminate, such as duroid, are bonded to form a package and drilled after which the resulting holes are plated. Next, the superfluous connections are removed by drilling during which process each stripline-coax transition buried in the package is tuned by a correct selection of the drill diameter and the hole depth.

Abstract translation: 在一个操作中制造多层微波板的方法。 层压体的单独蚀刻层（例如二元体）被结合以形成包装并钻孔，之后对所得到的孔进行电镀。 接下来，通过钻孔去除多余的连接，在该过程中，通过钻孔直径和孔深度的正确选择来调节埋在包装中的每个带状线 - 同轴转换过渡。

公开(公告)号：US06199273B1

公开(公告)日：2001-03-13

申请号：US08769449

申请日：1996-12-19

Applicant: Toshihiko Kubo ,  Takuji Ito ,  Hiroshi Takamichi ,  Akihiro Hidaka

Inventor： Toshihiko Kubo ,  Takuji Ito ,  Hiroshi Takamichi ,  Akihiro Hidaka

IPC: H01R900

CPC classification number: H01L23/49816 ,  H01L21/4853 ,  H01L2224/11334 ,  H01L2924/15173 ,  H05K1/113 ,  H05K3/0094 ,  H05K3/3436 ,  H05K3/3452 ,  H05K3/3478 ,  H05K2201/0379 ,  H05K2201/09572 ,  H05K2201/0959 ,  H05K2201/10666 ,  H05K2201/10992 ,  H05K2203/041 ,  H05K2203/043 ,  H05K2203/074 ,  H05K2203/1394 ,  Y02P70/613 ,  Y10T29/49147 ,  Y10T29/49149

Abstract: A ball-grid array connector structure for an electronic package in which the ball pitch can be reduced to increase the packaging density has a plastic substrate having at least one hollow through-hole and an electrode covering the wall of the through-hole and forming an electrode pad surrounding the through-hole on each surface of the substrate. A metallic ball is joined, either directly or through a solder or a combination of a metallic bump and a solder, to the electrode pad on at least one surface of the substrate at the position of the through-hole. The connector structure can be formed either by sealing an open end of the through-hole on the side to which the ball is not joined, or increasing the pressure within the through-hole by a pressure-control mechanism, before the through-hole is blocked by reflowing the ball itself or the metallic bump or solder used to connect the ball.

Abstract translation: 用于电子封装的球栅阵列连接器结构，其中球节距可以减小以增加封装密度，具有具有至少一个中空通孔的塑料基板和覆盖通孔壁的电极，并形成 围绕基板每个表面上的通孔的电极焊盘。 金属球直接或通过焊料或金属凸块和焊料的组合连接到通孔位置处的基板的至少一个表面上的电极焊盘。 连接器结构可以通过在通孔之前通过密封球体未接合的一侧上的通孔的开口端或通过压力控制机构来增加通孔内的压力来形成 通过回流球本身或用于连接球的金属凸块或焊料来阻止。

公开(公告)号：US6127253A

公开(公告)日：2000-10-03

申请号：US134210

申请日：1998-08-14

Applicant: Judith Marie Roldan ,  Ravi F. Saraf

Inventor： Judith Marie Roldan ,  Ravi F. Saraf

IPC: H01L21/60 ,  H01L23/485 ,  H05K3/32 ,  H01L21/44

CPC classification number: H05K3/321 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/11 ,  H01L2224/11505 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16058 ,  H01L2224/16225 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/29298 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01016 ,  H01L2924/01018 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/09701 ,  H01L2924/14 ,  H05K2201/0129 ,  H05K2201/0379 ,  H05K2201/10674 ,  H05K2201/10984 ,  H05K2203/0783 ,  H05K2203/176

Abstract: An electronic device that is equipped with a plurality of bonding pads positioned on the device for making electrical interconnections and electrically conductive composite bumps adhered to the bonding pads wherein the bumps are formed of a composite material consisting of a thermoplastic polymer and at least about 30 volume percent of conductive metal particles based on the total volume of the metal particles and the thermoplastic polymer. The present invention is also directed to a method of making electrical interconnections to an electronic device by pressing a plurality of composite bumps of a polymeric based material against a substrate having an electrically conductive surface by mechanical means under a sufficient temperature and/or a sufficient pressure. The present invention is further directed to a method of debonding an electronic device bonded by a composite binder by first providing an electronic device that is bonded by composite bumps consists of a thermoplastic polymer and at least about 30 volume percent of conductive metal particles and then exposing the composite bumps to a solvent or to a temperature not less than about 50%.degree. C. below the glass transition temperature of the composite bump.

Abstract translation: 一种电子设备，其配备有多个焊盘，该多个焊盘位于该装置上，用于进行电互连，并且该导电复合凸块粘附到该焊盘上，其中该凸块由热塑性聚合物和至少约30体积的复合材料形成 基于金属颗粒和热塑性聚合物的总体积的导电金属颗粒的百分比。 本发明还涉及一种通过在足够的温度和/或足够的压力下通过机械手段将聚合物基材料的多个复合凸块压靠在具有导电表面的基底上的方式来制造与电子器件的电互连的方法 。 本发明进一步涉及一种通过首先提供一种电子器件来分离由复合粘结剂粘接的电子器件的方法，所述电子器件通过由热塑性聚合物和至少约30体积％的导电金属颗粒组成的复合凸块接合，然后暴露 复合物凸起到溶剂或达到低于复合凸块的玻璃化转变温度不低于约50％℃的温度。

公开(公告)号：US6041495A

公开(公告)日：2000-03-28

申请号：US87929

申请日：1998-06-01

Applicant: Jin Hyun Yoon ,  Gi Bum Park ,  In Pyo Hong ,  Yong Kim ,  Myung Kee Chung

Inventor： Jin Hyun Yoon ,  Gi Bum Park ,  In Pyo Hong ,  Yong Kim ,  Myung Kee Chung

IPC: H01L23/12 ,  H01L21/60 ,  H01L23/31 ,  H01L23/498 ,  H05K1/11 ,  H05K3/00 ,  H05K3/06 ,  H05K3/24 ,  H05K3/40 ,  H05K3/42 ,  H05K3/30

CPC classification number: H01L23/3107 ,  H01L23/3114 ,  H01L23/49833 ,  H05K3/4007 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H05K1/113 ,  H05K2201/0347 ,  H05K2201/0355 ,  H05K2201/0367 ,  H05K2201/0379 ,  H05K2201/0394 ,  H05K2201/09563 ,  H05K2203/0369 ,  H05K2203/0542 ,  H05K3/064 ,  H05K3/244 ,  H05K3/423 ,  Y10T29/49117 ,  Y10T29/49144 ,  Y10T29/49146 ,  Y10T29/49165

Abstract: A first method of manufacturing a printed circuit board includes steps of (a) preparing a board which has a chip mounting area and circuit patterns on an upper surface and metal pads to be electrically connected to the circuit patterns on a lower surface, (b) attaching a metal plate to the lower surface of the board, (c) forming metal patterns on the metal pads by etching the metal plate, and (d) forming metal bumps by plating the metal patterns. A second method of manufacturing a circuit board, in this case a flexible circuit board, includes the steps of (a) preparing a board having Cu patterns, plated with a Au layer, attached to a lower surface of a polyimide tape, (b) forming a plurality of via holes in the polyimide tape, which expose the Cu patterns to the upper surface of the polyimide tape, (c) coating the upper surface of the polyimide tape with a photoresist, and exposing and developing the photoresist to form openings therein which expose the via holes, (d) plating walls, defining the openings and the via holes, with Cu, (e) removing remaining portions of the photoresist to produce Cu bumps, and (f) plating the bumps to protect the Cu. The printed circuit boards of the present invention have advantages in that they are not subject to a misalignment of the metal bumps with their underlying conductive pattern, and eliminate the need to use flux, thereby being environmentally friendly.

Abstract translation: 制造印刷电路板的第一种方法包括以下步骤：（a）制备具有芯片安装区域和上表面上的电路图案的板，以及与下表面上的电路图案电连接的金属焊盘;（b） 将金属板附着到板的下表面，（c）通过蚀刻金属板在金属焊盘上形成金属图案，（d）通过镀金属图案形成金属凸块。 制造电路板的第二种方法（在这种情况下为柔性电路板）包括以下步骤：（a）准备具有附着在聚酰亚胺胶带的下表面上的镀有Au层的Cu图案的板，（b） 在聚酰亚胺胶带中形成多个通孔，将Cu图案暴露于聚酰亚胺胶带的上表面，（c）用光致抗蚀剂涂覆聚酰亚胺胶带的上表面，并曝光和显影光致抗蚀剂以在其中形成开口 其暴露通孔，（d）用Cu限定开口和通孔的电镀壁，（e）除去光致抗蚀剂的剩余部分以产生Cu凸块，以及（f）电镀凸块以保护Cu。 本发明的印刷电路板的优点在于，它们不会使金属凸块与其下面的导电图案不对准，并且不需要使用助焊剂，因此是环境友好的。