公开(公告)号：US07476563B2

公开(公告)日：2009-01-13

申请号：US11561241

申请日：2006-11-17

Applicant: Marc A. Mangrum ,  Kenneth R. Burch

Inventor： Marc A. Mangrum ,  Kenneth R. Burch

IPC: H01L21/44

CPC classification number: H01L23/5389 ,  H01L21/568 ,  H01L21/6835 ,  H01L24/24 ,  H01L24/82 ,  H01L24/96 ,  H01L24/97 ,  H01L25/16 ,  H01L28/20 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24011 ,  H01L2224/24195 ,  H01L2224/82001 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15192 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3011 ,  H05K1/185 ,  H05K3/4644 ,  H05K2201/0919 ,  H01L2224/82

Abstract: A method is for packaging a first device having a first major surface and a second major surface. An encapsulant is formed over a second major surface of the first device and around sides of the first device. This leaves the first major surface of the first device exposed. A first dielectric layer is formed over the first major surface of the first device. a side contact interface is formed having at least a portion over the first dielectric layer. The encapsulant is cut to form a plurality of sides of encapsulant. A portion of the encapsulant is removed along a first side of the plurality of sides to expose a portion of the side contact interface along the first side of the plurality of sides.

Abstract translation: 一种方法是用于包装具有第一主表面和第二主表面的第一装置。 密封剂形成在第一装置的第二主表面和第一装置的侧面周围。 这使第一个器件的第一个主表面暴露出来。 第一介电层形成在第一器件的第一主表面上。 形成具有在第一介电层上方的至少一部分的侧面接触界面。 密封剂被切割以形成密封剂的多个侧面。 密封剂的一部分沿着多个侧面的第一侧去除，以沿着多个侧面的第一侧暴露侧接触界面的一部分。

公开(公告)号：US07440256B2

公开(公告)日：2008-10-21

申请号：US10541494

申请日：2004-09-27

Applicant: Masanori Hongo ,  Hiroyuki Nishikiori ,  Natsuyo Nagano ,  Takashi Ogura

Inventor： Masanori Hongo ,  Hiroyuki Nishikiori ,  Natsuyo Nagano ,  Takashi Ogura

IPC: H01G2/20 ,  H01G4/228

CPC classification number: H01L23/49805 ,  H01L2224/48091 ,  H01L2224/48227 ,  H05K1/0306 ,  H05K3/0052 ,  H05K3/403 ,  H05K3/4061 ,  H05K3/4611 ,  H05K3/4629 ,  H05K2201/0919 ,  Y10T29/4913 ,  Y10T428/24777 ,  Y10T428/24926 ,  H01L2924/00014

Abstract: A laminated ceramic substrate includes a side electrode in which a side edge electrode layer formed on a side edge portion of a ceramic layer overlaps with and connects to a side edge electrode layer formed on a side edge portion of another ceramic layer directly above and/or directly below the former ceramic layer. The side edge electrode layer includes a parallel wall unexposed and approximately parallel to a side surface of the laminated ceramic substrate and a perpendicular wall approximately perpendicular to the side surface of the laminated ceramic substrate. A length La of the parallel wall and a depth Lb of the parallel wall from the side surface of the laminated ceramic substrate have a relationship of La>Lb.

Abstract translation: 层叠陶瓷基板包括侧面电极，其中形成在陶瓷层的侧边缘部分上的侧边缘电极层与形成在另一陶瓷层的侧边缘部分上的侧边缘电极层重叠并连接到另一陶瓷层的正上方和/或 直接在以前的陶瓷层下面。 侧边电极层包括未曝光并且大致平行于层叠陶瓷基板的侧表面的平行壁和大致垂直于层叠陶瓷基板的侧表面的垂直壁。 平行壁的长度La和层叠陶瓷基板的侧面的平行壁的深度Lb具有La> Lb的关系。

公开(公告)号：US20080186685A1

公开(公告)日：2008-08-07

申请号：US12013245

申请日：2008-01-11

Applicant: Jung-Chan CHO ,  Hyun-Seok CHOI ,  Yong-Hyun KIM ,  Hyung-Mo HWANG ,  Kyu-Tae KIM

Inventor： Jung-Chan CHO ,  Hyun-Seok CHOI ,  Yong-Hyun KIM ,  Hyung-Mo HWANG ,  Kyu-Tae KIM

IPC: H05K1/14 ,  H05K1/02 ,  H05K7/20

CPC classification number: H05K1/0207 ,  H05K1/056 ,  H05K3/4641 ,  H05K2201/0919 ,  H05K2201/10159 ,  H05K2201/1056 ,  H05K2203/1572

Abstract: The invention provides a semiconductor memory module. The semiconductor memory module includes a printed circuit board part having a first surface and a second surface facing the first surface, and a metal core having an insert part inserted inside the printed circuit board part and an extension part elongated from at least one side of the printed circuit board. The semiconductor memory module also includes memory parts mounted on the printed circuit board. The metal core has a folding structure having at least one bent portion to substantially cover the memory parts.

Abstract translation: 本发明提供一种半导体存储器模块。 半导体存储器模块包括印刷电路板部分，其具有第一表面和面向第一表面的第二表面，以及金属芯，其具有插入在印刷电路板部分内部的插入部分和从第一表面的至少一侧伸长的延伸部分 印刷电路板。 半导体存储器模块还包括安装在印刷电路板上的存储器部件。 金属芯具有折叠结构，其具有至少一个弯曲部分，以基本上覆盖存储部件。

公开(公告)号：US07405948B2

公开(公告)日：2008-07-29

申请号：US10543253

申请日：2004-01-22

Applicant: Junya Sato ,  Yoshiyuki Hashimoto ,  Masakazu Koizumi

Inventor： Junya Sato ,  Yoshiyuki Hashimoto ,  Masakazu Koizumi

IPC: H05K1/11

CPC classification number: H01R13/2414 ,  H01R12/52 ,  H05K1/0298 ,  H05K3/325 ,  H05K3/368 ,  H05K2201/0314 ,  H05K2201/0919 ,  H05K2201/09845

Abstract: A circuit board device comprises a first wiring board (79) having plural first electrode terminals (73, 75, 77) for connection row-arranged on a surface layer, a second wiring board (87) having plural second electrode terminals (81, 83, 85) for connection row-arranged on a surface layer, and an anisotropic conductive member (89) disposed therebetween to the electrode terminals (73, 75, 77, 81, 83, 85). A local portion of each of the wiring boards (79, 87) has a step difference to divide and dispose the electrode terminals (73, 75, 77, 81, 83, 85). A local portion of the anisotropic conductive member (89) corresponding to the step difference has a step shape that is capable of contacting with the step difference. A laminate comprising respective wiring boards (79, 87) and the anisotropic conductive member disposed therebetween is pressed and held in a lamination direction.

Abstract translation: 一种电路板装置，具备：第一配线基板（79），具有多个第一电极端子（73,75,77），用于连接排列在表面层上;第二布线板（87），具有多个第二电极端子（81,83 ，85），以及设置在所述电极端子（73,75,77,81,83,85）之间的各向异性导电构件（89）。 每个布线板（79,87）的局部部分具有台阶差以分隔和布置电极端子（73,75,77,81,83,85）。 对应于台阶差的各向异性导电构件（89）的局部部分具有能够与台阶差接触的台阶形状。 包括各个布线板（79,87）和设置在其间的各向异性导电构件的层叠体被压制并保持在层叠方向。

公开(公告)号：US20080083984A1

公开(公告)日：2008-04-10

申请号：US11905721

申请日：2007-10-03

Applicant: Takashi Kagawa

Inventor： Takashi Kagawa

IPC: H01L23/48 ,  H05K1/00

CPC classification number: H05K1/0259 ,  H01L23/49811 ,  H01L23/50 ,  H01L23/60 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05553 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10162 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/19041 ,  H05K2201/0919 ,  H05K2201/093 ,  H01L2924/00 ,  H01L2224/45099

Abstract: In a conventional wiring board, it is not possible to effectively attract electric charges provided by a charged body to a side surface of a wiring board and, therefore, it cannot be said that sufficient measures against static electricity have been taken for the wiring board. A wiring board including: an insulating layer (L2); a conductive layer (Lc2) overlaid on the insulating layer (L2); and an insulating layer (L1) overlaid oh the conductive layer (Lc2), wherein the conductive layer (Lc2) is connected to a ground potential node and is configured inclusive of a plane part (20) formed planar within the plane of the wiring board (SUB) and a plurality of protruding parts (21) extending from the plane part (20) toward the side faces of the wiring board (SUB), protruding faces (22) forming the front edges of the protruding parts (21) are exposed at the side faces of the wiring board (SUB), and thus a plurality of the protruding faces 22 are disposed at the side faces of the wiring board (SUB).

Abstract translation: 在传统的布线板中，不可能有效地将带电体提供的电荷吸引到布线板的侧面，因此不能说布线板已经采取了足够的静电措施。 一种布线板，包括：绝缘层（L 2）; 覆盖在绝缘层（L2）上的导电层（Lc2）; 以及覆盖在所述导电层（Lc 2）上的绝缘层（L 1），其中所述导电层（Lc 2）连接到地电位节点并且被构造成包括平面部分（20），所述平面部分（20）在 布线板（SUB）和从平面部分（20）向布线板（SUB）的侧面延伸的多个突出部分（21），形成突出部分（21）的前边缘的突出面（22） ）在布线基板（SUB）的侧面露出，因此在布线基板（SUB）的侧面设置有多个突出面22。

公开(公告)号：US07344085B2

公开(公告)日：2008-03-18

申请号：US11060360

申请日：2005-02-18

Applicant: Mauro Rossi

Inventor： Mauro Rossi

IPC: G06K7/00

CPC classification number: H05K1/117 ,  H01R12/523 ,  H01R12/721 ,  H05K3/4611 ,  H05K2201/09127 ,  H05K2201/0919 ,  H05K2201/09845 ,  H05K2203/061

Abstract: Multilayer expansion card for connecting an apparatus or device to an electronic apparatus, particularly for association to a mother card of a Personal Computer. The card comprises a first part, intended principally for connection, having a thickness coherent with the requirements of size for connection to the standard slots of the mother card, and a second part, intended principally for the management of the card functions and for processing, and hence the electronics, having a greater thickness with respect to the first part in order to contain a correspondingly greater number of layers intended for the management of a high density of electronic-type signals.

Abstract translation: 用于将设备或设备连接到电子设备的多层扩展卡，特别是用于与个人计算机的母卡相关联。 该卡包括主要用于连接的第一部分，其具有与用于连接到母卡的标准槽的尺寸要求相一致的厚度;以及第二部分，主要用于管理卡功能和用于处理， 并且因此电子器件相对于第一部件具有更大的厚度，以便容纳相应更多数量的层以用于管理高密度的电子型信号。

公开(公告)号：US20080026602A1

公开(公告)日：2008-01-31

申请号：US11868085

申请日：2007-10-05

Applicant: Alan Wang ,  Kevin Olson

Inventor： Alan Wang ,  Kevin Olson

IPC: H01R12/00

CPC classification number: H05K3/445 ,  H01L2224/16225 ,  H05K1/056 ,  H05K3/002 ,  H05K3/0052 ,  H05K3/403 ,  H05K3/426 ,  H05K3/44 ,  H05K3/4614 ,  H05K3/4641 ,  H05K3/4644 ,  H05K2201/0129 ,  H05K2201/0166 ,  H05K2201/0397 ,  H05K2201/0909 ,  H05K2201/09154 ,  H05K2201/09181 ,  H05K2201/0919 ,  H05K2201/09554 ,  H05K2201/09645 ,  H05K2201/09827 ,  H05K2203/1105 ,  H05K2203/135 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A circuit board includes an electrically conductive sheet having an insulative coating surrounding the conductive sheet, with a surface of the insulative coating around an edge of the conductive sheet having an arcuate or rounded shape. At least one electrical conductor is conformally deposited on at least the rounded insulative coating around the edge of the conductive sheet and defined via photolithographic and metallization techniques. Each electrical conductor on the insulative coating thereon around the edge of the conductive sheet conforms to the arcuate or rounded shape of the insulative coating and, therefore, has an arcuate or rounded shape.

Abstract translation: 电路板包括具有围绕导电片的绝缘涂层的导电片，绝缘涂层的表面围绕导电片的边缘具有弓形或圆形形状。 至少一个电导体保形地沉积在导电片的边缘周围的至少圆形绝缘涂层上，并通过光刻和金属化技术限定。 导电片边缘周围的绝缘涂层上的每个电导体符合绝缘涂层的弧形或圆形形状，因此具有弓形或圆形形状。

公开(公告)号：US20080017305A1

公开(公告)日：2008-01-24

申请号：US11490092

申请日：2006-07-21

Applicant: Syh-Tau Yeh ,  Yao-Ming Chen

Inventor： Syh-Tau Yeh ,  Yao-Ming Chen

IPC: B32B37/00

CPC classification number: H05K3/403 ,  H05K3/363 ,  H05K3/4614 ,  H05K2201/0919 ,  H05K2201/09845 ,  H05K2201/10477

Abstract: A method for fabricating a multi-layered printed circuit board without via holes is disclosed herein, which includes the steps of: providing a plurality of layers of printed circuit boards each having circuits pre-formed thereon; stacking the plurality of layers of the printed circuit boards; and electrically connecting corresponding pads on the plurality of layers of the printed circuit boards; wherein the circuits to be connected with each other on different layers of the printed circuit boards are electrically connected to the pads that are extended to an edge of the printed circuit boards. The multi-layered printed circuit board without via holes in accordance with the present invention can overcome the prior disadvantages caused by the via holes.

Abstract translation: 本文公开了一种用于制造没有通孔的多层印刷电路板的方法，其包括以下步骤：提供多个印刷电路板层，各层具有预先形成在其上的电路; 堆叠印刷电路板的多个层; 并且电连接印刷电路板的多个层上的相应焊盘; 其中在印刷电路板的不同层上彼此连接的电路电连接到延伸到印刷电路板的边缘的焊盘。 根据本发明的没有通孔的多层印刷电路板可以克服由通孔引起的现有缺点。

公开(公告)号：US20070047377A1

公开(公告)日：2007-03-01

申请号：US11500960

申请日：2006-08-09

Applicant: Hyo-Jae Bang ,  Dong-Chun Lee ,  Ho-Geon Song ,  Seong-Chan Han ,  Kwang-Su Yu ,  Dong-Woo Shin

Inventor： Hyo-Jae Bang ,  Dong-Chun Lee ,  Ho-Geon Song ,  Seong-Chan Han ,  Kwang-Su Yu ,  Dong-Woo Shin

IPC: G11C8/00

CPC classification number: H05K3/403 ,  H01L2224/48091 ,  H01L2224/4824 ,  H05K3/0052 ,  H05K3/4069 ,  H05K3/4614 ,  H05K3/4647 ,  H05K2201/0355 ,  H05K2201/0919 ,  H05K2203/1189 ,  H01L2924/00014

Abstract: Example embodiments of the present invention may include a printed circuit board, a method of manufacturing the printed circuit board, and a memory module/socket assembly. Example embodiments of the present invention may increase the number of contact taps on a memory module, in addition, a force required to insert the memory module into a module socket may be decreased.

Abstract translation: 本发明的示例性实施例可以包括印刷电路板，制造印刷电路板的方法和存储器模块/插座组件。 本发明的示例实施例可以增加存储器模块上的接触抽头的数量，此外，可以减少将存储器模块插入模块插座所需的力。

公开(公告)号：US20060258188A1

公开(公告)日：2006-11-16

申请号：US11487979

申请日：2006-07-18

Applicant: Osamu Daikuhara ,  Toshihiro Kusagaya ,  Toru Yamakami ,  Takahiro Kondou

Inventor： Osamu Daikuhara ,  Toshihiro Kusagaya ,  Toru Yamakami ,  Takahiro Kondou

IPC: H05K1/00

CPC classification number: H05K3/242 ,  H05K1/117 ,  H05K3/0047 ,  H05K3/429 ,  H05K2201/0919 ,  H05K2201/0949 ,  H05K2203/0207 ,  H05K2203/175 ,  Y10T29/49117 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A printed circuit board of a card edge connector type includes interconnections formed on a surface of a substrate to be electrically coupled to respective connecting terminals formed by electrolytic plating on an edge of the substrate, and connecting terminal-forming wirings being respectively in connection with the interconnections, when the connecting terminals are formed by the electrolytic plating. The interconnections are electrically isolated from the connecting terminal-forming wirings by process openings formed in the substrate.